TISP9110MDMR-S

TISP9110MDM INTEGRATED COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION TISP9110MDM Overvoltage Protector High Performance Protection for SLICs with +ve and -ve Battery Supplies – Wide -110 V to +110 V Programming Range – Low 5 mA max. Gate Triggering Current – Dynamic Protection Performance Specified for International Surge Waveshapes Additional Information Click these links for more information: PRODUCT TECHNICAL INVENTORY SAMPLES SELECTOR LIBRARY Applications include: – Wireless Local Loop – Access Equipment – Regenerated POTS – VOIP Applications CONTACT Agency Recognition Description UL File Number: E215609 Rated for International Surge Wave Shapes Wave Shape Standard IPPSM A 2/10 GR-1089-CORE 150 10/700 ITU-T K.20/21/45 80 10/1000 GR-1089-CORE 50 8-SOIC (210 mil) Package (Top View) (Tip or Ring) Line The Model TISP9110MDM is programmed by connecting the G1 and G2 gate terminals to the negative (-V(BAT)) and positive (+V(BAT)) SLIC Battery supplies respectively. This creates a protector operating at typically +1.4 V above +V(BAT) and -1.4 V below -V(BAT) under a.c. power induction and power contact conditions. The protector gate circuitry incorporates 4 separate buffer transistors designed to provide independent control for each protection element. The gate buffer transistors minimize supply regulation issues by reducing the gate current drawn to around 5 mA, while the high voltage base emitter structures eliminate the need for expensive reverse bias protection gate diodes. 8 NC (-V(BAT)) G1 2 7 Ground (+V(BAT)) G2 3 6 Ground (Ring or Tip) Line 4 5 NC Description The Model TISP9110MDM is a programmable overvoltage protection device designed to protect modern dual polarity supply rail ringing SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line. Overvoltages can be caused by lightning, a.c. power contact and induction. Four separate protection structures are used; two positive and two negative to provide optimum protection during Metallic (Differential) and Longitudinal (Common Mode) protection conditions in both polarities. Dynamic protection performance is specified under typical international surge waveforms from Telcordia GR-1089-CORE, ITU-T K.44 and YD/T 950. 1 NC - No internal connection Terminal typical application names shown in parenthesis MD-8SOIC(210)-003-a Device Symbol Line G1 The Model TISP9110MDM is rated for common surges contained in regulatory requirements such as ITU-T K.20, K.45, Telcordia GR-1089-CORE, YD/T 950. With the use of appropriate overcurrent protection devices such as the Bourns® Multifuse® and Telefuse™ devices, circuits can be designed to comply with modern telecom standards. G2 Ground Line SD-TISP9-001-a APRIL 2013 – REVISED JULY 2019 WARNING Cancer and Reproductive Harm www.P65Warnings.ca.gov *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP9110MDM Overvoltage Protector How To Order Device Package Carrier TISP9110MDM 8-SOIC (210 mil) Embossed Tape Reeled Order As TISP9110MDMR-S Marking Code Standard Quantity 9110M 2000 Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted) Rating Symbol Value Unit VDRM -120 +120 V Repetitive peak off-state voltage VG1(Line) = 0,V G2 ≥ +5 V VG2(Line) = 0,V G1 ≥ -5 V Non-repetitive peak impulse current (see Notes 1, 2, 3 and 4) 2/10 μs (Telcordia GR-1089-CORE) 5/310 μs (ITU-T K.20, K.21 & K.45, K.44 open-circuit voltage wave shape 10/700 ms) 10/1000 μs (T elcordia GR-1089-CORE) IPPSM ±150 ±80 ±50 A ITSM 9.0 5.0 1.7 A V Non-repetitive peak on-state current, 50 Hz / 60 Hz (see Notes 1, 2, 3 and 5) 0.2 s 1s 900 s Maximum negative battery supply voltage VG1M -110 Maximum positive battery supply voltage VG2M +110 V Maximum differential battery supply voltage V(BAT)M 220 V Junction temperature Storage temperature range TJ -40 to +150 °C Tstg -65 to +150 °C NOTES: 1. Initially the device must be in thermal equilibrium with TJ = 25 °C. The surge may be repeated after the device returns to its initial conditions. 2. The rated current values may be applied to either of the Line to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of a single terminal pair). 3. Rated currents only apply if pins 6 & 7 (Ground) are connected together. 4. Applies for the following bias conditions: VG1 = -20 V to -110 V, VG2 = 0 V to +110 V. 5. EIA/JESD51-2 environment and EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm printed wiring track widths. Electrical Characteristics for any Section, TA = 25 °C (Unless Otherwise Noted) Parameter Test Conditions VD = VDRM, VG1(Line) = 0, VG2 ≥ +5 V ID Off-state current VD = VDRM, VG2(Line) = 0, VG1 ≥ -5 V Min Typ TA = 25 °C TA = 85 °C TA = 25 °C TA = 85 °C Max Unit -5 -50 +5 +50 μA IG1(Line) Negative-gate leakage current VG1(Line) = -220 V -5 μA IG2(Line) Positive-gate leakage current VG2(Line) = +220 V +5 μA VG1L(BO) Gate - Line impuls e breakover voltage VG1 = -100 V, IT = -100 A (see Note 6) VG1 = -100 V, IT = -30 A VG2L(BO) Gate - Line impuls e breakover voltage VG2 = +100 V, IT = +100 A (see Note 6) VG2 = +100 V, IT = +30 A IH- Negative holding current IG1T Negative-gate trigger current IT = -5 A,t IG2T Positive-gate trigger current IT = 5 A,t CO Line - Ground off-state capacitance NOTE: VG1 = -60 V, IT = -1 A, di/dt = 1 A/ms 2/10 μs 10/1000 μs -15 -11 V 2/10 μs 10/1000 μs +15 +11 V +5 mA -5 mA - 150 mA p(g) ≥ 20 μs, VG1 = -60 V p(g) ≥ 20 μs, VG2 = 60 V f = 1 MHz, VD = -3 V, G1 & G2 open circuit 33 pF 6. Voltage measurements should be made with an oscillosc ope with limited bandwidth (20 MHz) to avoid high frequency noise. APRIL 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP9110MDM Overvoltage Protector Thermal Characteristics, TA = 25 °C (Unless Otherwise Noted) Parameter RθJA NOTE Junction to ambient thermal resistance Test Conditions Min Typ Max Unit 55 °C/W EIA/JESD51-7 PCB, EIA/JESD51-2 Environment, PTOT = 4 W (See Note 7) 7. EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm printed wiring track widths. Parameter Measurement Information +i Quadrant I IPPSM Switching Characteristic ITSM ITRM V(BO) IH V G1 -v VD ID ID VD V G2 +v IH V(BO) ITRM Quadrant III ITSM Switching Characteristic IPPSM -i PM-TISP9-001-a Figure 1. Voltage-Current Characteristic Unless Otherwise Noted, All Voltages are Referenced to the Ground Terminal APRIL 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP9110MDM Overvoltage Protector Typical Characteristics OFF-STATE CAPACITANCE vs OFF-STATE VOLTAG E TC-TISP9-001-a Co - Off-state Capacitance - pF 45 40 35 30 25 20 15 10 0.1 NON-REPETITIVE PEAK ON-STATE CURRENT vs CURRENT DURATION ITSM(t) - Non-Repetitive Peak On-State Current - A 50 Thermal Information TJ = 25 °C V d = 1 Vrms 1 10 V D - Off-state Voltage - V 100 Figure 2. TI-TISP9-001-a 15 V GEN = 600 Vrms, 50/60 Hz RGEN = 1.4*V GEN/ITSM(t) EIA/JESD51-2 ENVIRONMENT EIA/JESD51-7 PCB, TA = 25 °C SIMULTANEOUS OPERATION OF R AND T TERMINALS. GROUND TERMINAL CURRENT = 2 x ITSM(t) 10 9 8 7 6 5 4 3 2 1.5 1 0.1 1 10 100 1000 t - Current Duration - s Figure 3. Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com www.bourns.com APRIL 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP9110MDM Overvoltage Protector APPLICATIONS INFORMATION Overcurrent Protection SLIC SLIC PROTECTOR Tip C1 220 nF Ring C2 220 nF TISP9110MDM +V BAT D1 -VBAT Figure 4. Typical Application Diagram GR-1089-CORE Intra Building Overcurrent Protection 1 F1a B0500T F1b B0500T ITU-T K.20 (Basic) Overcurrent Protection 2 ITU-T K.20 (Enhanced 10/700 μs 4 kV) Overcurrent Protection 3 + t° MF-SM013-250 + t° *55 Ω CPTC + t° MF-SM013-250 + t° *55 Ω CPTC Figure 5. Typical Overcurrent Protection * Specific CPTC can withstand 10/700 4 kV without primary protector. “TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in the U.S. Patent and Trademark Office. “Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries. APRIL 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Legal Disclaimer Notice This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and P[ZHɉSPH[LZJVSSLJ[P]LS`¸)V\YUZ¹ Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change ^P[OV\[UV[PJL