CMS35N04V8-HF

MOSFET CMS35N04V8-HF N-Channel RoHS Device Halogen Free PDFN3.3x3.3(SPR-PAK) Features - Advanced DMOS trench technology. - Fast switching. - Improve dv/dt capability. - Green device available. - 100% EAS guaranteed. Mechanical data 0.126(3.20) 0.118(3.00) 0.102(2.59) 0.094(2.39) D D D D 8 7 6 5 0.020(0.50) 0.012(0.30) 0.136(3.45) 0.126(3.20) 0.126(3.20) 0.118(3.00) 0.066(1.68) 0.058(1.48) 0.006(0.15) Max. 1 2 3 4 S S S G 0.020(0.50) 0.012(0.30) 0.026(0.65) BSC 0.014(0.35) 0.010(0.25) - Case: PDFN3.3x3.3/SPR-PAK standard package, molded plastic. 0.031(0.80) 0.028(0.70) 0.134(3.40) 0.126(3.20) 0.010(0.25) 0.004(0.10) Circuit diagram D - G : Gate - S : Source - D : Drain Dimensions in inches and (millimeter) G S Maximum Ratings Symbol Value Unit Drain-source voltage VDS 40 V Gate-source voltage VGS ±20 V Parameter Conditions ID @ TC = 25°C 35 ID @ TC = 100°C 22.1 Continuous drain current (Note 1) Pulsed drain current (Note 1, 2) A IDM 140 PD @ TC = 25°C 44 PD @ TA = 25°C 2 Total power dissipation (Note 4) A W Single pulse avalanche energy, L=0.1mH (Note 3) EAS 61 mJ Single pulse avalanche current, L=0.1mH (Note 3) IAS 35 A Operating junction temperature range TJ -55 to +150 °C TSTG -55 to +150 °C Storage temperature range Thermal resistance junction-ambient (Note 1) Steady state RθJA 62.5 °C/W Thermal resistance junction-case (Note 1) Steady state RθJC 2.8 °C/W Company reserves the right to improve product design , functions and reliability without notice. REV:A Page 1 QW-JTR72 Comchip Technology CO., LTD. MOSFET Electrical Characteristics (at T =25°C unless otherwise noted) J Parameter Symbol Conditions Min Drain-source breakdown voltage BVDSS VGS = 0V, ID = 250µA 40 Gate threshold voltage VGS(th) VDS = VGS, ID = 250µA 1.2 Typ Max 1.7 2.5 Unit V Gate-source leakage current IGSS Drain-source leakage current (Tj=25°C) VGS = ±20V ±100 VDS = 40V, VGS = 0V 1 VDS = 32V, VGS = 0V 10 µA IDSS Drain-source leakage current (Tj=85°C) Static drain-source on-resistance (Note 2) VGS = 10V, ID = 10A 7.5 9 VGS = 4.5V, ID = 8A 11 13.5 RDS(on) mΩ Total gate charge (Note 2) Qg Gate-source charge Qgs Gate-drain (”miller”) charge Qgd 5.1 Turn-on delay time (Note 2) td(on) 13.2 Rise time Turn-off delay time tr td(off) 19.7 ID = 8A, VDS = 20V, VGS = 10V 2.8 VDS = 15V, VGS = 10V 2.2 ID = 1A, RG = 3.3Ω 72 nC nS tf 4.5 Input capacitance Ciss 1220 Output capacitance Coss Reverse transfer capacitance Crss Gate resistance Rg f = 1MHZ VSD IS = 10A, VGS = 0V, TJ=25°C Fall time nA VGS = 0V, VDS = 25V, f = 1MHZ pF 130 55 2.2 Ω Source-drain diode Diode forward voltage (Note 2) Continuous source current (Note 1, 6) IS 1.2 V 35 A 70 A VG = VD = 0V, Force current Pulsed source current (Note 2, 6) ISM Guaranteed avalanche characteristics Single pulse avalanche energy (Note 5) EAS VDD = 25V, L=0.1mH, IAS = 18A 16.2 mJ Notes: 1. The data tested by surface mounted on a 1 inch² FR-4 board with 2 oz copper. 2. The data tested by pulsed, pulse width ≤300µs, duty cycle ≤ 2%. 3. The EAS data shows max. rating. The test condition is VDD=25V, VGS=10V, L=0.1mH, IAS=35A. 4. The power dissipation is limited by 150°C junction temperature. 5. The min. value is 100% EAS tested guarantee. 6. The data is theoretically the same as ID and IDM, in real applications, should be limited by total power dissipation. Company reserves the right to improve product design , functions and reliability without notice. REV:A Page 2 QW-JTR72 Comchip Technology CO., LTD. MOSFET Rating and Characteristic Curves (CMS35N04V8-HF) Fig.1 - Drain Current vs. Tc Fig.2 - Gate Charge Characteristics 10 Gate-to-Source Voltage, VGS (V) 35 Drain Current, ID (A) 28 21 14 7 25 50 75 100 125 8 6 4 2 0 150 0 5 10 15 Case Temperature, TC (°C) Gate Charge, QG (nC) Fig.3 - Normalized VGS(th) vs. TJ Fig.4 - Normalized RDS(ON) vs. TJ 1.2 20 1.8 Normalized On-Resistance Normalized Gate Threshold Voltage, (V) 0 VDS=20V ID=8A 1.1 1.0 0.9 0.8 0.7 0.6 -50 0 100 50 150 1.6 1.4 1.2 1.0 0.8 0.6 -50 Junction Temperature, TJ (°C) 0 50 100 150 Junction Temperature, TJ (°C) Fig.5 - Safe Operating Area Drain Current, ID (A) 100 10µs 100µs 10 1ms 10ms 100ms 1 DC Tc=25°C 0.1 0.1 1 10 100 Drain-to-Source Voltage, VDS (V) Company reserves the right to improve product design , functions and reliability without notice. REV:A Page 3 QW-JTR72 Comchip Technology CO., LTD. MOSFET Reel Taping Specification d P0 P1 T E F W B C P A 12 o 0 D1 D2 D W1 Trailer Device ....... ....... End ....... ....... ....... ....... Leader ....... ....... 50 ± 2 pockets Start 140 ± 2 pockets Direction of Feed SYMBOL SPR-PAK SPR-PAK A B C d D 1.50 + 0.10 - 0.00 330.00 ± 1.00 178.00 + 0.00 - 2.00 13.00 min. 7.008 + 0.000 - 0.079 0.512 min. D2 (mm) 3.55 ± 0.10 3.55 ± 0.10 1.10 + 0.10 - 0.05 (inch) 0.140 ± 0.004 0.140 ± 0.004 0.043 + 0.004 - 0.002 0.059 + 0.004 - 0.000 12.992 ± 0.039 SYMBOL E F P P0 P1 (mm) 1.75 ± 0.10 5.50 ± 0.05 8.00 ± 0.10 4.00 ± 0.10 2.00 ± 0.05 0.30 ± 0.05 (inch) 0.069 ± 0.004 0.217 ± 0.002 0.315 ± 0.004 0.157 ± 0.004 0.079 ± 0.002 0.012 ± 0.002 W 12.00 + 0.30 - 0.10 0.472 + 0.012 - 0.004 W1 18.40 ref. 0.724 ref. Company reserves the right to improve product design , functions and reliability without notice. REV:A Page 4 QW-JTR72 Comchip Technology CO., LTD. MOSFET Marking Code 8 Part Number Marking Code CMS35N04V8-HF 40N09 7 5 6 40N09 XXXX 1 3 2 4 Pin 1 XXXX = Control code Suggested PAD Layout SPR-PAK (PDFN3.3x3.3) SIZE (mm) (inch) A 0.40 0.016 B 0.60 0.024 C 2.35 0.093 A F B G D D 3.55 0.140 E 2.80 0.110 F 0.65 0.026 G 0.35 0.014 H 0.25 0.010 C H E Note: 1. The pad layout is for reference purposes only. Standard Packaging REEL PACK Case Type SPR-PAK (PDFN3.3x3.3) REEL Reel Size ( pcs ) (inch) 3000 13 Company reserves the right to improve product design , functions and reliability without notice. REV:A Page 5 QW-JTR72 Comchip Technology CO., LTD.