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TLS115B0LDXUMA1

TLS115B0LDXUMA1

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TFDFN10

  • 描述:

    IC REG LIN POS ADJ 150MA TSON-10

  • 数据手册
  • 价格&库存
TLS115B0LDXUMA1 数据手册
OPTIREG™ Linear TLS115B0 High Precision Voltage Tracke r Features • 150 mA current capability • Very high accuracy voltage tracking • Output voltage adjustable down to 2.0 V • Stable with ceramic output capacitors • Very low dropout voltage • Very low current consumption in OFF mode • Internally controlled soft start • Wide input voltage range: -16 V ≤ VIN ≤ 45 V • Wide temperature range: -40°C ≤ Tj ≤ 150°C • Short circuit protected output (to GND and to battery) • Reverse polarity protected input • Overtemperature protection • Green Product (RoHS compliant) • AEC Qualified Applications • Automotive sensor supply • Protected sensor supply for off-board sensors • Secondary voltage supply in automotive ECU • High-precision voltage tracking • Precision voltage replication • Power switch for off-board load Description The OPTIREG™ Linear TLS115B0 is a monolithic integrated low-dropout voltage tracking regulator with high accuracy in small PG-DSO-8 exposed pad and PG-TSON-10 packages. The TLS115B0 is designed to supply offboard systems, for example sensors in powertrain management systems under the severe conditions of automotive applications. Therefore, the TLS115B0 is equipped with protection functions against reverse polarity and against short circuit to GND and battery. Up to a supply voltage of 45 V and output currents up to 150 mA, the output voltage follows the reference voltage that is applied to the ADJ input with very high accuracy. The required minimum reference voltage at ADJ is 2.0 V. Data Sheet www.infineon.com/OPTIREG-Linear 1 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Type Package Marking TLS115B0EJ PG-DSO-8 EP 115B0 TLS115B0LD PG-TSON-10 115B0 Data Sheet 2 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 2.1 2.2 2.3 2.4 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin assignment TLS115B0EJ in PG-DSO-8 EP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin definitions and functions TLS115B0EJ in PG-DSO-8 EP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin assignment TLS115B0LD in PG-TSON-10 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin definitions and functions TLS115B0LD in PG-TSON-10 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5 5 6 6 3 3.1 3.2 3.3 General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7 8 8 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 Block description and electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tracking regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical performance characteristics tracking regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical performance characteristics current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enable input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical performance characteristics Enable input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Adjust input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical performance characteristics Adjust input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 12 15 15 17 17 18 18 5 5.1 5.2 5.2.1 5.2.2 5.2.3 5.3 5.4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Selection of external components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Adjust pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 19 19 20 20 20 21 6 Package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Data Sheet 3 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block diagram 1 Block diagram OUT IN Protection Circuits EN ADJ Enable Temperature Shutdown GND Figure 1 Data Sheet TLS115B0 block diagram 4 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Pin configuration 2 Pin configuration 2.1 Pin assignment TLS115B0EJ in PG-DSO-8 EP package OUT 1 8 IN N.C. 2 7 EN GND 3 6 N.C. N.C. 4 5 ADJ Figure 2 TLS115B0EJ pin configuration 2.2 Pin definitions and functions TLS115B0EJ in PG-DSO-8 EP package Pin Symbol Function 1 OUT Tracker output 150 mA output current capability Connect to GND with a capacitor close to the pins, respecting capacitance and ESR requirements given in Table 2 Functional range. 2 N.C. Not connected 3 GND Ground 4 N.C. Not connected 5 ADJ Adjust Connect to the reference voltage 6 N.C. Not Connected 7 EN Enable input “High” signal: enables the tracker “Low” signal: disables the tracker If the enable function is not required, then connect EN to IN. 8 IN Input It is recommended to connect a small ceramic capacitor to GND close to the pins in order to compensate line influence. Pad – Exposed Pad Connect to GND Data Sheet 5 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Pin configuration 2.3 Pin assignment TLS115B0LD in PG-TSON-10 package TSON-10 OUT 1 N.C. 2 9 N.C. GND 3 8 EN N.C. 4 7 N.C. N.C. 5 6 ADJ 10 IN Figure 3 TLS115B0LD pin configuration 2.4 Pin definitions and functions TLS115B0LD in PG-TSON-10 package Pin Symbol Function 1 OUT Tracker output 150 mA output current capability Connect to GND with a capacitor close to the pins, respecting capacitance and ESR requirements given in Table 2 Functional range. 3 GND Ground 6 ADJ Adjust Connect to the reference voltage 8 EN Enable input “High” signal: enables the tracker “Low” signal: disables the tracker If the enable function is not required, then connect EN to IN. 10 IN Input It is recommended to connect a small ceramic capacitor to GND close to the pins in order to compensate line influence. 2, 4, 5, 7, 9 N.C. Not connected Pad Exposed Pad Connect to GND Data Sheet – 6 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker General product characteristics 3 General product characteristics 3.1 Absolute maximum ratings Table 1 Absolute maximum ratings1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. VIN -16 – 45 V – P_3.1.1 VEN -16 – 45 V – P_3.1.2 VADJ -16 – 45 V – P_3.1.3 VOUT -5 – 45 V – P_3.1.4 VIN-VOUT -30 – 45 V – P_3.1.5 Junction temperature Tj -40 – 150 °C – P_3.1.7 Storage temperature Tstg -55 – 150 °C – P_3.1.8 ESD susceptibility to GND VESD,HBM -4 – 4 kV Human Body Model (HBM)2) P_3.1.9 ESD susceptibility to GND VESD,CDM -1 – 1 kV Charge Device Model (CDM)3) P_3.1.10 ESD susceptibility to GND VESD,CDM -1 – 1 kV Charge Device Model (CDM) at corner pins3) P_3.1.11 Input IN Voltage Enable EN Voltage Adjust ADJ Voltage Output OUT Voltage Input Output Voltage Difference Voltage Temperatures ESD Absorption 1) Not subject to production test, specified by design. 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) 3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101 Notes 1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 7 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker General product characteristics 3.2 Functional range Table 2 Functional range Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Input voltage range VIN 4 – 45 V – P_3.2.1 Adjust input voltage range (voltage tracking range) VADJ 2 – 14 V – P_3.2.2 Output capacitor COUT 1 – – µF –1)2) P_3.2.3 Output capacitor’s Equivalent Series Resistance ESR (COUT) – – 5 Ω –2) P_3.2.4 Junction temperature Tj -40 – 150 °C –2) P_3.2.5 1) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%. 2) Not subject to production test, specified by design. Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. 3.3 Thermal resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Table 3 Thermal resistance TLS115B0EJ in PG-DSO-8 EP package Parameter Symbol 1) Values Min. Typ. Max. Unit Note or Test Condition Number P_3.3.1 Junction to case RthJC – 18 – K/W – Junction to pin RthJP – 85 – K/W – P_3.3.2 2) Junction to ambient RthJA – 50 – K/W 2s2p board P_3.3.3 Junction to ambient RthJA – 157 – K/W 1s0p board, footprint only3) P_3.3.4 Junction to ambient RthJA – 77 – K/W 1s0p board, 300 mm2 P_3.3.5 heatsink area on PCB3) Junction to Ambient RthJA – 63 – K/W 1s0p board, 600 mm2 P_3.3.6 heatsink area on PCB3) 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (chip and package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 2 inner copper layers (2 × 70 µm Cu, 2 × 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The product (chip and package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70 µm Cu). Data Sheet 8 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker General product characteristics Table 4 Thermal resistance TLS115B0LD in PG-TSON-10 package Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number P_3.3.7 Junction to case1) RthJC – 17 – K/W – Junction to pin RthJP – 96 – K/W – P_3.3.8 2) Junction to ambient RthJA – 67 – K/W 2s2p board P_3.3.9 Junction to ambient RthJA – 194 – K/W 1s0p board, footprint only3) P_3.3.10 Junction to ambient RthJA – 82 – K/W 1s0p board, 300 mm2 P_3.3.11 heatsink area on PCB3) Junction to ambient RthJA – 68 – K/W 1s0p board, 600 mm2 P_3.3.12 heatsink area on PCB3) 1) Not subject to production test, specified by design. 2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The product (chip and package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 2 inner copper layers (2 × 70 µm Cu, 2 × 35 µm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer. 3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The product (chip and package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70 µm Cu). Data Sheet 9 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics 4 Block description and electrical characteristics 4.1 Tracking regulator The regulator controls the output voltage VOUT by comparing it to the voltage applied to the ADJ pin and driving a PNP pass transistor accordingly. The stability of the control loop depends on: • the output capacitor COUT • load current • chip temperature • the poles and zeroes in the frequency response of the circuit consisting of TLS115B0 and the load An input capacitor CIN is strongly recommended for buffering the line influence. To ensure stable operation, the output capacitor’s capacitance and its equivalent series resistance ESR requirements given in the table “Functional range” on Page 8 must be maintained. For details see also the typical performance graph “Output capacitor ESR(COUT) vs. output current IOUT” on Page 14. The output capacitor must be sized suitably to buffer load transients. Connect each capacitor close to the pins. Protection circuitry prevents the TLS115B0 itself as well as the application from destruction in case of catastrophic events. These safeguards contain: • output current limitation • reverse polarity protection • thermal shutdown In order to protect the pass element and the package from excessive power dissipation the TLS115B0 reduces the maximum output current at high input voltage. The TLS115B0 allows a negative supply voltage. However, in reverse polarity condition several low currents flowing into the TLS115B0 increase junction temperature. Thermal design must consider this effect, because in reverse polarity condition the overtemperature protection circuit does not operate. The overtemperature protection circuit prevents immediate destruction of the TLS115B0 in certain fault conditions (for example a permanent short circuit at output) by switching off the power stage. After the chip cools down, the regulator restarts. If the fault is not removed, then this leads to an oscillatory behavior of the output voltage. Please note, that a junction temperature above 150°C is outside the maximum ratings and reduces the lifetime of the TLS115B0. Table 5 Electrical characteristics tracking regulator VIN = 13.5 V, 2.0 V ≤ VADJ ≤ 14 V, VEN ≥ 2.0 V, Tj = -40°C to +150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified). Parameter Symbol Values Min. Typ. Max. -5 – 5 Unit Note or Test Condition Number mV 5.5 V ≤ VIN ≤ 22 V; 0.1 mA ≤ IOUT ≤ 150 mA; 2 V ≤ VADJ ≤ VIN - 1 V P_4.1.1 Tracking output Output voltage tracking accuracy ∆VOUT = VADJ - VOUT Data Sheet ∆VOUT 10 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics Table 5 Electrical characteristics tracking regulator (cont’d) VIN = 13.5 V, 2.0 V ≤ VADJ ≤ 14 V, VEN ≥ 2.0 V, Tj = -40°C to +150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified). Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Output voltage tracking accuracy ∆VOUT = VADJ - VOUT ∆VOUT -5 – 5 mV 5.5 V ≤ VIN ≤ 32 V; 0.1 mA ≤ IOUT ≤ 70 mA; 2 V ≤ VADJ ≤ VIN - 1 V P_4.1.2 Load regulation steady-state ∆VOUT,load -4 -0.1 – mV IOUT = 0.1 mA to 150 mA; VADJ = 5 V P_4.1.3 Line regulation steady-state ∆VOUT,line – 0.1 4 mV VIN = 5.5 V to 32 V; IOUT = 10 mA; VADJ = 5 V P_4.1.4 Power supply ripple rejection1) PSRR – 85 – dB fripple = 100 Hz; Vripple = 1 Vpp; IOUT = 10 mA; COUT = 10 μF, ceramic type P_4.1.5 Output current limitation IOUT,max 151 350 500 mA VOUT = VADJ - 0.1 V; VADJ = 5 V P_4.1.6 Reverse current IOUT,rev -3.5 -1.7 – mA VIN = 0 V; VOUT = 16 V; VADJ = 5 V P_4.1.9 Reverse current at negative IIN,rev input voltage -4 -2 – mA VIN = -16 V; VOUT = 0 V; VADJ = 5 V P_4.1.10 Dropout voltage2) Vdr = VIN - VOUT – 250 500 mV IOUT = 150 mA; VADJ = 5 V2) P_4.1.11 Overtemperature shutdown Tj,sd threshold – 175 – °C Tj increasing due to P_4.1.15 power dissipation generated by the IC Overtemperature shutdown ∆Tj,sdh threshold hysteresis – 15 – K Vdr Overtemperature protection P_4.1.16 1) Not subject to production test, specified by design 2) Measured when the output voltage VOUT has dropped 100 mV from the nominal value obtained at VIN = 13.5V Data Sheet 11 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics 4.2 Typical performance characteristics tracking regulator Tracking accuracy ΔVOUT vs. junction temperature Tj Output current limitation IOUT,max vs. input voltage VIN 2 600 IOUT = 100 μA 1.5 Tj = 25 °C VIN = 13.5V IOUT = 75 mA VADJ = 5 V Tj = 150 °C’ IOUT = 150 mA 500 1 400 IOUT,max [mA] ΔVOUT [mV] 0.5 0 300 −0.5 200 −1 100 −1.5 −2 0 50 Tj [°C] 100 0 150 Output voltage VOUT vs. adjust voltage VADJ 0 10 20 VIN [V] 30 40 Output voltage VOUT vs. input voltage VIN 6 7 VIN = 13.5 V IOUT = 10 mA Tj = 25 °C 5 VADJ = 5 V IOUT = 10 mA Tj = 25 °C 6 5 VOUT [V] VOUT [V] 4 3 4 3 2 2 1 0 1 0 1 2 3 4 0 5 VADJ [V] Data Sheet 0 2 4 6 8 10 VIN [V] 12 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics Load regulation ΔVOUT,load vs. output current IOUT Line regulation ΔVOUT,line vs. input voltage VIN 2 2 Tj = −40 °C 1.5 Tj = −40 °C VIN = 13.5V Tj = 25 °C Tj = 150 °C 1 1 0.5 0.5 ΔVOUT,line [mV] ΔVOUT,load [mV] Tj = 150 °C 0 0 −0.5 −0.5 −1 −1 −1.5 −1.5 −2 0 50 100 −2 150 5 10 15 IOUT [mA] Dropout voltage Vdr vs. junction temperature Tj Tj = −40 °C VIN = 13.5V IOUT = 50 mA 40 Tj = 150 °C 350 350 300 300 250 250 Vdr [mV] Vdr [mV] 35 200 200 150 150 100 100 50 50 0 50 Tj [°C] VIN = 13.5V Tj = 25 °C 400 IOUT = 150 mA Data Sheet 30 450 IOUT = 1 mA 0 20 25 VIN [V] Dropout voltage Vdr vs. output current IOUT 450 400 IOUT = 10 mA Tj = 25 °C 1.5 100 0 150 0 50 100 150 IOUT [mA] 13 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics Reverse current IOUT,rev vs. output voltage VOUT 0 0 −0.5 −0.5 −1 −1 −1.5 −1.5 IOUT,rev [mA] IIN,rev [mA] Reverse current IIN,rev vs. input voltage VIN −2 −2 −2.5 −2.5 −3 −3 Tj = −40 °C −3.5 VADJ = 5 V VOUT = 0 V Tj = 25 °C Tj = 150 °C −4 −15 −10 −5 −4 0 Tj = −40 °C VADJ = 5 V VIN = 0 V −3.5 0 Tj = 25 °C Tj = 150 °C 5 VIN [V] 10 15 VOUT [V] Power supply ripple rejection PSRR vs. ripple frequency fr Output capacitor ESR(COUT) vs. output current IOUT 100 1 10 Unstable Region 90 80 70 0 10 ESR(COUT) [Ω] PSRR [dB] 60 50 40 Stable Region −1 10 30 20 10 0 −2 10 IOUT = 10 mA COUT = 10 μF VIN = 13.5 V Vripple = 1 Vpp Tj = 25 °C COUT = 1 μF 6 V < VIN < 15 V −40 °C < Tj < 150 °C −2 −1 10 0 1 10 10 2 10 10 3 10 Data Sheet 0 50 100 150 IOUT [mA] f [kHz] 14 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics 4.3 Current consumption Table 6 Electrical characteristics current consumption VIN = 13.5 V, 2.0 V ≤ VADJ ≤ 14 V, VEN ≥ 2.0 V, Tj = -40°C to +150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified). Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Current consumption Stand-by mode Iq,off = IIN Iq,off – 0.1 5 µA VEN ≤ 0.4 V; Tj ≤ 125°C P_4.3.1 Current consumption Iq = IIN - IOUT Iq – 55 90 µA IOUT ≤ 0.1 mA; VADJ = 5 V; Tj ≤ 125 °C P_4.3.2 Current consumption Iq = IIN - IOUT Iq – 7 14 mA IOUT ≤ 150 mA; VADJ = 5 V P_4.3.3 4.4 Typical performance characteristics current consumption Current consumption Iq vs. output current IOUT Current consumption Iq vs. input voltage VIN 12 800 Tj = −40 °C Tj = −40 °C VIN = 13.5 V Tj = 25 °C Tj = 150 °C 10 VADJ = 5 V IOUT = 100 μA Tj = 25 °C 700 Tj = 150 °C 600 8 Iq [μA] Iq [mA] 500 6 400 300 4 200 2 100 0 0 50 100 0 150 IOUT [mA] Data Sheet 15 10 15 20 25 VIN [V] 30 35 40 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics Current consumption Iq vs. junction temperature Tj Current consumption Iq vs. junction temperature Tj (IOUT low) 12 150 IOUT = 50 mA IOUT = 100 mA 10 VIN = 13.5 V IOUT = 100 μA VIN = 13.5 V IOUT = 150 mA 100 Iq [μA] Iq [mA] 8 6 4 50 2 0 0 50 Tj [°C] 100 0 150 0 50 Tj [°C] 100 150 Current consumption in OFF mode Iq,off vs. junction temperature Tj 4 VIN = 13.5 V VEN ≤ 0.4 V 3.5 3 Iq,off [μA] 2.5 2 1.5 1 0.5 0 Data Sheet 0 50 Tj [°C] 100 150 16 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics 4.5 Enable input In order to minimize the quiescent current, the TLS115B0 can be switched to stand-by mode by setting the corresponding enable input “EN” to “low”. If the EN pin is not connected, then the “low” level from the internal pull-down resistor switches off the regulator. Table 7 Electrical characteristics Enable input VIN = 13.5 V, 2.0 V ≤ VADJ ≤ 14 V, Tj = -40°C to +150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified). Parameter Symbol Values Min. Typ. Max. Unit Note or Test Condition Number Enable off voltage range VEN,off – – 0.8 V VOUT = 0 V, IOUT ≤ 5 μA, Tj ≤ 125°C P_4.5.1 Enable on voltage range VEN,on 2 – – V VOUT settled P_4.5.2 Enable input current IEN – 2 4 µA VEN = 5 V P_4.5.3 4.6 Typical performance characteristics Enable input Enable input current IEN vs. Enable input voltage VEN 40 Tj = −40 °C VIN = 13.5V Tj = 25 °C 35 Tj = 150 °C 30 IEN [μA] 25 20 15 10 5 0 Data Sheet 0 10 20 VEN [V] 30 40 17 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Block description and electrical characteristics 4.7 Adjust input The Adjust input must be connected to the reference voltage, which is tracked. Table 8 Electrical characteristics Adjust input VIN = 13.5 V, 2.0 V ≤ VADJ ≤ 14 V, VEN ≥ 2.0 V, Tj = -40°C to +150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified). Parameter Symbol Adjust input current 4.8 IADJ Values Min. Typ. Max. – 0.03 1 Unit Note or Test Condition Number μA VADJ = 5 V P_4.7.1 Typical performance characteristics Adjust input Adjust input current IADJ vs. Adjust input voltage VADJ Adjust input current IADJ vs. junction temperature Tj 100 100 Tj = −40 °C 90 Tj = 25 °C 80 70 60 60 IADJ [nA] 70 50 50 40 40 30 30 20 20 10 10 0 Data Sheet 2 4 VIN = 13.5 V VADJ = 5 V IOUT = 100 μA 90 Tj = 150 °C 80 IADJ [nA] VIN = 13.5V IOUT = 100 μA 6 8 VADJ [V] 10 0 12 18 0 50 Tj [°C] 100 150 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Application information 5 Application information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 5.1 Application diagram VBAT I D1 Main Regulator VDD Q GND Micro Controller I/O EN VREF CIN2 ADJ TLS115B0 OUT IN CIN1 GND Figure 4 TLS115B0 application circuit 5.2 Selection of external components 5.2.1 Input pin COUT e.g. off board loads, sensors Figure 4 shows the typical input circuitry for a voltage tracking regulator. The following external components at the input are recommended in case of possible external disturbance. A ceramic capacitor CIN1 (100 nF to 470 nF) at the input filters high frequency disturbance imposed by the line, such as ISO pulses 3a/b. Place CIN1 very close to the input pin of the voltage tracking regulator on the PCB. An aluminum electrolytic capacitor CIN2 (10 µF to 470 µF) at the input smoothens high energy pulses, such as ISO pulse 2a. Place CIN2 close to the input pin of the voltage tracking regulator on the PCB. An accordingly sized overvoltage suppressor diode D1 suppresses high voltage beyond the maximum ratings of the circuit components and protects the devices from damage due to overvoltage. Data Sheet 19 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Application information 5.2.2 Output pin An output capacitor COUT is mandatory for the stability of the voltage tracking regulator. The requirements for COUT are described in the table “Functional range” on Page 8. The graph “Output capacitor ESR(COUT) vs. output current IOUT” on Page 14 shows the stable operation range of the TLS115B0. For automotive environment, ceramic capacitors with X5R or X7R dielectrics are recommended. Place COUT on the same side of the PCB as the regulator itself and as close as possible to both the tracker output pin and GND pin. In case of rapid transients of input voltage or load current, COUT must be dimensioned properly to ensure the output stability in the application. 5.2.3 Adjust pin Figure 4 shows a typical Adjust circuitry for a voltage tracking regulator. Typically the Adjust Pin is connected to a fixed voltage reference that the regulator tracks. In the example of the application diagram ADJ is connected to the supply voltage of a microcontroller. The voltage reference can also be adjusted by a voltage divider. 5.3 Thermal considerations Knowing the input voltage, the output voltage and the load profile of the application, the total power dissipation can be calculated: (5.1) P D = ( V IN – V OUT ) × I OUT + V IN × I q with • PD: continuous power dissipation • VIN: input voltage • VOUT: output voltage • IOUT: output current • Iq: quiescent current The maximum acceptable thermal resistance RthJA can then be calculated: T j, max – T a R thJA, max = ---------------------------PD (5.2) with • Tj,max: maximum allowed junction temperature • Ta: ambient temperature Based on the above calculation the proper PCB type and the necessary heat sink area can be determined with reference to the specification in “Thermal resistance” on Page 8. Example Application conditions: VIN = 13.5 V VOUT = VADJ = 5 V IOUT = 100 mA Data Sheet 20 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Application information Ta = 75°C Calculation of RthJA,max: PD = (VIN – VOUT) x IOUT + VIN x Iq = (13.5V – 5V) x 100 mA + 13.5 V x 3.5 mA = 0.897 W RthJA,max = (Tj,max – Ta) / PD = (150°C – 75°C) / 0.897 W = 83.61 K/W As a result, the PCB design must ensure a thermal resistance RthJA lower than 83.61 K/W. According to “Thermal resistance” on Page 8, at least 300 mm2 heatsink area is required on the FR4 1s0p PCB, or the FR4 2s2p board can be used. 5.4 • Further application information For further information you may contact http://www.infineon.com/ Data Sheet 21 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Package outlines 6 Package outlines 0.35 x 45˚ 1.27 0.41±0.09 2) 0.2 M 0.19 +0.06 0.08 C Seating Plane C A-B D 8x 0.64 ±0.25 D 0.2 6 ±0.2 8˚ MAX. C 0.1 C D 2x 1.7 MAX. Stand Off (1.45) 0.1+0 -0.1 3.9 ±0.11) M D 8x Bottom View 8 1 5 1 4 8 4 5 2.65 ±0.2 3 ±0.2 A B 4.9 ±0.11) 0.1 C A-B 2x Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width 3) JEDEC reference MS-012 variation BA Figure 5 Data Sheet PG-DSO-8-27-PO V01 PG-DSO-8 EP 22 Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker 0 +0.05 0.36 ±0.1 1.63 ±0.1 Z 0.71 ±0.1 Pin 1 Marking 0.25 ±0.1 3.3 ±0.1 0.05 0.5 ±0.1 0.53 ±0.1 1.48 ±0.1 3.3 ±0.1 2.58 ±0.1 0.55 ±0.1 0.1 ±0.1 0.96 ±0.1 0.2 ±0.1 1±0.1 Package outlines Pin 1 Marking 0.25 ±0.1 PG-TSON-10-2-PO V02 Z (4:1) 0.07 MIN. Figure 6 PG-TSON-10 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 23 Dimensions in mm Rev. 1.10 2020-03-19 OPTIREG™ Linear TLS115B0 High Precision Voltage Tracker Revision history 7 Revision history Revision Date Changes 1.10 2020-03-19 Data Sheet - updated - Maximum rating for the input output voltage difference added - Editorial changes 1.00 2016-10-13 Data Sheet - Initial Version Data Sheet 24 Rev. 1.10 2020-03-19 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2020-03-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2020 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference Z8F55515725 IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 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