N-Channel SuperFET II FRFET MOSFET
600 V, 52 A, 72 mΩ
D
Features
Typical RDS(on) = 62 mΩ at VGS = 10 V, ID = 26 A
Typical Qg(tot) = 160 nC at VGS = 10V, ID = 26 A
UIS Capability
G
Qualified to AEC Q101
G
RoHS Compliant
Description
SuperFET® II MOSFET is ON Semiconductor’s brand-new high
voltage super-junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on-resistance
and lower gate charge performance. This technology is tailored
to minimize conduction loss, provide superior switching
performance, dv/dt rate and higher avalanche energy.
Consequently SuperFETII is very well suited for the Soft switching
and Hard Switching topologies like High Voltage Full Bridge and
Half Bridge DC-DC, Interleaved Boost PFC, Boost PFC for HEV-EV
automotive.
SuperFET II FRFET® MOSFET’s optimized body diode reverse
recovery performance can remove additional component and
improve system reliability.
D
S
TO-247
S
Application
Automotive On Board Charger
Automotive DC/DC converter for HEV
Maximum Ratings TC = 25°C unless otherwise noted
Symbol
Drain to Source Voltage
VDSS
VGS
ID
Parameter
Ratings
600
Gate to Source Voltage
Drain Current - Continuous (VGS=10) (Note 1)
TC = 25°C
TC = 100°C
Pulsed Drain Current
EAS
dv/dt
PD
Single Pulse Avalanche Rating
Units
V
±20
V
52
A
33
A
See Fig 4
A
1128
mJ
(Note 2)
MOSFET dv/dt
100
Peak Diode Recovery dv/dt
(Note 3)
V/ns
50
Power Dissipation
481
W
Derate Above 25oC
3.85
W/oC
TJ, TSTG Operating and Storage Temperature
o
-55 to + 150
RθJC
Maximum Thermal Resistance Junction to Case
RθJA
Maximum Thermal Resistance Junction to Ambient
(Note 4)
C
0.26
o
C/W
40
o
C/W
Package Marking and Ordering Information
Device Marking
FCH072N60F
Device
FCH072N60F-F085
Package
TO-247
Reel Size
-
Tape Width
-
Quantity
30
Notes:
1: Current is limited by bondwire configuration.
2: Starting TJ = 25°C, L = 25mH, IAS = 9.5A, VDD = 100V during inductor charging and VDD = 0V during time in avalanche.
3: ISD ≤ 26A, di/dt ≤ 200 A/us, VDD ≤ 380V, starting TJ = 25°C.
4: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. RθJC is guaranteed by design, while RθJAis determined by the board design. The maximum rating
presented here is based on mounting on a 1 in2 pad of 2oz copper.
©2014 Semiconductor Components Industries, LLC.
August-2017, Rev2
Production Order Number:
FCH072N60F-F085/D
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
FCH072N60F-F085
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
IDSS
Drain to Source Leakage Current
IGSS
Gate to Source Leakage Current
ID = 250μA, VGS = 0V
VDS = 600V,
VGS = 0V
600
-
-
V
-
-
10
μA
TJ = 25oC
TJ = 150oC(Note 5)
-
-
1
mA
-
-
±100
nA
3.0
4.0
5.0
V
-
62
72
mΩ
-
154
195
mΩ
-
6330
-
pF
-
199
-
pF
pF
VGS = ±20V
On Characteristics
VGS(th)
rDS(on)
Gate to Source Threshold Voltage
Drain to Source On Resistance
VGS = VDS, ID = 250μA
ID = 26A,
VGS = 10V
TJ = 25oC
TJ = 150oC(Note 5)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Qg(ToT)
Total Gate Charge
Qg(th)
Threshold Gate Charge
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller“ Charge
VDS = 100V, VGS = 0V,
f = 1MHz
f = 1MHz
VDD = 380V
ID = 26A
VGS = 10V
-
1.25
-
-
0.46
-
Ω
-
160
210
nC
-
11
16
nC
-
34
-
nC
-
67
-
nC
Switching Characteristics
ton
Turn-On Time
-
75
100
ns
td(on)
Turn-On Delay Time
-
44
-
ns
tr
Rise Time
-
31
-
ns
td(off)
Turn-Off Delay Time
-
128
-
ns
tf
Fall Time
-
22
-
ns
toff
Turn-Off Time
-
150
200
ns
VDD = 380V, ID = 26A,
VGS = 10V, RG = 4.7Ω
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Voltage
ISD = 26A, VGS = 0V
-
-
1.2
V
Trr
Reverse Recovery Time
-
185
-
ns
Qrr
Reverse Recovery Charge
IF = 26A, dISD/dt = 100A/μs
VDD = 480V
-
1515
-
nC
Note:
5: The maximum value is specified by design at TJ = 150°C. Product is not tested to this condition in production.
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2
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
Electrical Characteristics TJ = 25°C unless otherwise noted
60
1.0
50
VGS = 10V
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
0.0
0
25
50
75
100
125
TC, CASE TEMPERATURE(oC)
30
20
10
0
150
Figure 1. Normalized Power Dissipation vs. Case
Temperature
40
25
50
75
100
125
TC, CASE TEMPERATURE(oC)
150
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
NORMALIZED THERMAL
IMPEDANCE, ZθJC
2
1
0.1
DUTY CYCLE - DESCENDING ORDER
D = 0.50
0.20
0.10
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
0.01
-5
10
-4
-3
10
-2
-1
0
10
10
10
t, RECTANGULAR PULSE DURATION(s)
1
10
10
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
VGS = 10V
TC = 25oC
IDM, PEAK CURRENT (A)
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
I = I2
150 - TC
125
100
SINGLE PULSE
10
-5
10
-4
10
-3
10
t, RECTANGULAR PULSE DURATION(s)
Figure 4. Peak Current Capability
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3
-2
10
-1
10
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
Typical Characteristics
150
100
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
1000
10us
10
100us
1
OPERATION IN THIS
AREA MAY BE
LIMITED BY RDS(on)
1ms
10ms
100ms
SINGLE PULSE
TJ = MAX RATED
0.1
o
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
120
VDS = 20V
90
TJ = 150oC
60
TJ = 25oC
30
TJ = -55oC
TC = 25 C
0
0.01
1
10
100
1000
VDS, DRAIN TO SOURCE VOLTAGE (V)
3
Figure 5. Forward Bias Safe Operating Area
150
VGS = 0 V
100
10
TJ = 150 oC
TJ = -55 oC
TJ = 25 oC
1
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
80μs PULSE WIDTH
TJ = 25oC
120
VGS
15V Top
10V
8V
7V
6V
5.5V
5V Bottom
90
60
30
5V
0
1.4
0
4
8
12
16
20
VDS, DRAIN TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Forward Diode Characteristics
Figure 8. Saturation Characteristics
300
80μs PULSE WIDTH
TJ = 150oC
rDS(on), DRAIN TO SOURCE
ON-RESISTANCE (mΩ)
ID, DRAIN CURRENT (A)
100
60
ID = 26A
250
VGS
15V Top
10V
8V
7V
6V
5.5V
5V Bottom
80
200
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
TJ = 150oC
150
40
100
20
50
TJ = 25oC
5V
0
9
Figure 6. Transfer Characteristics
ID, DRAIN CURRENT (A)
IS, REVERSE DRAIN CURRENT (A)
200
4
5
6
7
8
VGS, GATE TO SOURCE VOLTAGE (V)
0
4
8
12
16
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
20
0
4
5
6
7
8
9
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 10. RDSON vs. Gate Voltage
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4
10
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
Typical Characteristics
1.2
PULSE DURATION = 80μs
DUTY CYCLE = 0.5% MAX
2.5
2.0
1.5
1.0
ID = 26A
VGS = 10V
0.5
0.0
-80
VGS = VDS
ID = 250μA
1.1
NORMALIZED GATE
THRESHOLD VOLTAGE
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
3.0
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE(oC)
0.9
0.8
0.7
0.6
0.5
-80
200
Figure 11. Normalized RDSON vs. Junction
Temperature
1.0
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE(oC)
200
Figure 12. Normalized Gate Threshold Voltage vs.
Temperature
100000
1.2
CAPACITANCE (pF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
ID = 10mA
1.1
1.0
Ciss
10000
1000
Coss
100
0.9
10
0.8
-80
-40
0
40
80
120
160
TJ, JUNCTION TEMPERATURE (oC)
1
0.1
200
Figure 13. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
f = 1MHz
VGS = 0V
Crss
1
10
100
1000
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 14. Capacitance vs. Drain to Source
Voltage
28
10
ID = 26A
8
VDS = 240V
VDS = 300V
21
VDS = 360V
6
EOSS, [μJ]
VGS, GATE TO SOURCE VOLTAGE(V)
Figure 16.
4
7
2
0
14
0
30
60
90
120
Qg, GATE CHARGE(nC)
150
180
Figure 15. Gate Charge vs. Gate to Source
Voltage
0
0
100
200
300
400
500
VDS, Drain to Source Voltage [V]
Figure 16. Eoss vs. Drain to Source
Voltage
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5
600
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
Typical Characteristics
Figure 17. Gate Charge Test Circuit & Waveform
VDS
RG
V
10V
GS
RL
VDS
90%
VDD
VGS
DUT
VGS
10%
td(on)
tr
t on
Figure 18. Resistive Switching Test Circuit & Waveforms
VGS
Figure 19. Unclamped Inductive Switching Test Circuit & Waveforms
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6
td(off)
tf
t off
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
IG = const.
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
Figure 20. Peak Diode Recovery dv/dt Test Circuit & Waveforms
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7
VDD
FCH072N60F-F085 N-Channel Auto SuperFET, 600V, 52A, 72mohm
DUT
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