MOSFET – Power,
N-Channel, SUPERFET) III,
Easy-Drive
650 V, 24 A, 125 mW
FCMT125N65S3
www.onsemi.com
General Description
SUPERFET III MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate.
Consequently, SUPERFET III MOSFET Easy−drive series helps
manage EMI issues and allows for easier design implementation.
The Power88 package is an ultra−slim surface−mount package
(1 mm high) with a low profile and small footprint (8 × 8 mm2).
SUPERFET III MOSFET in a Power88 package offers excellent
switching performance due to lower parasitic source inductance and
separated power and drive sources. Power88 offers Moisture
Sensitivity Level 1 (MSL 1).
Features
•
•
•
•
•
•
700 V @ TJ = 150°C
Typ RDS(on) = 100 m
Ultra Low Gate Charge (Typ. Qg = 49 nC)
Low Effective Output Capacitance (Typ. Coss(eff.) = 406 pF)
100% Avalanche Tested
These Devices are Pb−Free and are RoHS Compliant
Applications
• Telecom / Server Power Supplies
• Industrial Power Supplies
• UPS / Solar
VDSS
RDS(ON) MAX
ID MAX
650 V
125 m @ 10 V
24 A
D
S1: Driver Source
S2: Power Source
G
S1 S2
N-CHANNEL MOSFET
S2
S2
PQFN4 8X8 2P
CASE 483AP
S1
G
MARKING DIAGRAM
$Y&Z&3&K
FCMT
125N65S3
$Y
&Z
&3
&K
FCMT125N65S3
= ON Semiconductor Logo
= Assembly Plant Code
= Data Code (Year & Week)
= Lot
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2018
February, 2020 − Rev. 2
1
Publication Order Number:
FCMT125N65S3/D
FCMT125N65S3
ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted)
Symbol
Parameter
VDSS
Drain to Source Voltage
VGSS
Gate to Source Voltage
ID
Drain Current
Value
Unit
650
V
DC
±30
V
AC (f > 1 Hz)
±30
V
Continuous (TC = 25°C)
24
A
Continuous (TC = 100°C)
15
IDM
Drain Current
60
A
EAS
Single Pulsed Avalanche Energy (Note 2)
115
mJ
IAS
Avalanche Current (Note 2)
3.7
A
EAR
Repetitive Avalanche Energy (Note 1)
1.81
mJ
dv/dt
MOSFET dv/dt
100
V/ns
Peak Diode Recovery dv/dt (Note 3)
20
PD
Pulsed (Note 1)
Power Dissipation
TJ, TSTG
TL
(TC = 25°C)
181
W
Derate Above 25°C
1.45
W/°C
−55 to +150
°C
300
°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. IAS = 3.7 A, RG = 25 starting TJ = 25°C
3. ISD ≤ 12 A, di/dt ≤ 200 A/s, VDD ≤ 400 V, starting TJ = 25°C
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
Unit
RJC
Thermal Resistance, Junction to Case, Max.
0.69
°C/W
RJA
Thermal Resistance, Junction to Ambient, Max. (Note 4)
45
4. Device on 1 in2 pad 2 oz copper pad on 1.5 × 1.5 in. board of FR−4 material.
ORDERING INFORMATION
Device
Marking
Package
Reel Size
Tape Width
Quantity†
FCMT125N65S3
FCMT125N65S3
PQFN8
13″
13.3 mm
3000 Units
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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2
FCMT125N65S3
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
VGS = 0 V, ID = 1 mA, TJ = 25_C
650
V
VGS = 0 V, ID = 1 mA, TJ = 150_C
700
V
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
BVDSS/TJ
Breakdown Voltage Temperature
Coefficient
ID = 1 mA, Referenced to 25_C
IDSS
Zero Gate Voltage Drain Current
VDS = 650 V, VGS = 0 V
IGSS
Gate to Body Leakage Current
0.68
V/_C
10
A
±100
nA
4.5
V
125
m
1.35
VDS = 520 V, TC = 125_C
VGS = ±30 V, VDS = 0 V
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
RDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 12 A
100
Forward Transconductance
VDS = 20 V, ID = 12 A
16
S
1920
pF
44
pF
gFS
VGS = VDS, ID = 0.59 mA
2.5
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
VDS = 400 V, VGS = 0 V, f = 1 MHz
Coss(eff.)
Effective Output Capacitance
VDS = 0 V to 400 V, VGS = 0 V
406
pF
Coss(er.)
Energy Related Output Capacitance
VDS = 0 V to 400 V, VGS = 0 V
63
pF
Qg(tot)
Total Gate Charge at 10V
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
ESR
Equivalent Series Resistance
49
nC
VDS = 400 V, ID = 12 A, VGS = 10 V
(Note 5)
12
nC
22
nC
f = 1 MHz
0.5
22
ns
22
ns
60
ns
5.8
ns
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
VDD = 400 V, ID = 12 A,
VGS = 10 V, Rg = 4.7
(Note 5)
Turn-Off Fall Time
SOURCE-DRAIN DIODE CHARACTERISTICS
Maximum Continuous Source to Drain Diode Forward Current
24
A
ISM
Maximum Pulsed Source to Drain Diode Forward Current
60
A
VSD
Source to Drain Diode Forward
Voltage
1.2
V
IS
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, ISD = 12 A
VDD = 400 V, ISD = 12 A,
dIF/dt = 100 A/s
345
ns
5.7
C
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Essentially independent of operating temperature typical characteristics.
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3
FCMT125N65S3
TYPICAL PERFORMANCE CHARACTERISTICS
100
VGS = 10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
10
ID, Drain Current[A]
ID, Drain Current[A]
100
1
1. VDS = 20 V
2. 250 s Pulse Test
1505C
10
255C
1. 250 s Pulse Test
2. TC = 25°C
0.1
0.1
1
10
VDS, Drain−Source Voltage[V]
−555C
1
20
3
Figure 1. On-Region Characteristics
100
0.15
VGS = 10 V
VGS = 20 V
0.05
0.00
0
10
20
30
40
50
9
1. VGS = 0 V
2. 250 s Pulse Test
10
1505C
1
255C
0.1
−555C
0.01
0.001
0.1
60
0.5
1.0
1.5
ID, Drain Current [A]
VSD, Body Diode Forward Voltage [V]
Figure 3. On-Resistance Variation vs. Drain
Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and Temperature
200000
100000
Capacitances [pF]
IS, Reverse Drain Current [A]
TC = 25°C
0.10
5
6
7
8
VGS, Gate−Source Voltage[V]
Figure 2. Transfer Characteristics
10
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
10000
VGS, Gate−Source Voltage [V]
RDS(ON),
Drain−Source On−Resistance []
0.20
4
Ciss
1000
Coss
100
Crss
10
1. VGS = 0 V
2. f = 1 MHz
1
0.1
1
10
100
VDS = 130 V
8
VDS = 400 V
6
4
2
0
1000
ID = 12 A
VDS, Drain−Source Voltage [V]
Figure 5. Capacitance Characteristics
0
10
20
30
40
Qg, Total Gate Charge [nC]
50
Figure 6. Gate Charge Characteristics
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4
FCMT125N65S3
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
2.5
1. VGS = 0 V
2. ID = 10 mA
RDS(on), [Normalized]
Drain−Source On−Resistance
BVDSS, [Normalized]
Drain−Source Breakdown Voltage
1.2
1.1
1.0
0.9
0.8
−100
−50
0
50
100
150
2.0
1.5
1.0
0.5
0.0
200
1. VGS = 10 V
2. ID = 12 A
−50
0
50
100
150
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variant vs. Temperature
25
100
30 s
ID, Drain Current [A]
ID, Drain Current [A]
20
100 s
10
1 ms
Operation in This Area
is Limited by R DS(on)
1
10 ms
DC
1. TC = 25°C
2. TJ = 150°C
3. Single Pulse
0.1
1
15
10
5
10
100
0
25
1000
EOSS [ J]
8
6
4
2
130
260
390
520
100
125
Figure 10. Maximum Drain Current
vs. Case Temperature
10
0
75
TC, Case Temperature [ C]
Figure 9. Maximum Safe Operation Area
0
50
o
VDS, Drain−Source Voltage [V]
650
VDS, Drain to Source Voltage [V]
Figure 11. EOSS vs. Drain to Source Voltage
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5
150
FCMT125N65S3
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
2
1
0.1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
0.001
−5
10
ZJC(t) = r(t) x RJC
RJC = 0.69 oC/W
Peak TJ = PDM x ZJC(t) + TC
Duty Cycle, D = t1 / t2
SINGLE PULSE
−4
10
−3
−2
10
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Transient Thermal Response Curve
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6
−1
10
0
10
FCMT125N65S3
VGS
RL
Qg
VDS
VGS
Qgs
Qgd
DUT
IG = Const.
Figure 13. Gate Charge Test Circuit & Waveform
RL
VDS
VDS
90%
90%
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
10%
td(off)
tr
ton
tf
toff
Figure 14. Resistive Switching Test Circuit & Waveforms
L
E AS + 1 @ LI AS
2
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
2
ID(t)
VDD
VDS(t)
tp
tp
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
Time
FCMT125N65S3
+
DUT
VDS
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(DUT)
VSD
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
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8
VDD
FCMT125N65S3
PACKAGE DIMENSIONS
PQFN4 8X8, 2P
CASE 483AP
ISSUE O
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9
FCMT125N65S3
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FCMT125N65S3/D