FDMA410NZT

MOSFET – N-Channel, POWERTRENCH), Ultra Thin, 1.5 V 20 V, 9.5 A, 23 mW FDMA410NZT www.onsemi.com Description This Single N−Channel MOSFET has been designed using ON Semiconductor’s advanced Power Trench process to optimize the RDS(on) @ VGS = 1.5 V on special MicroFETTM leadframe. This design is similar to the FDMA410NZ, however it features our new advanced 0.55 mm max 2 x 2 MLP package technology. VDS RDS(on) MAX ID MAX 20 V 23 mW @ 4.5 V 9.5 A Ultra Thin N−Channel Features • • • • • • • 0.55 mm max package height MicroFET 2 x 2 mm Package Max RDS(on) = 23 mW at VGS = 4.5 V, ID = 9.5 A Max RDS(on) = 29 mW at VGS = 2.5 V, ID = 8.0 A Max RDS(on) = 36 mW at VGS = 1.8 V, ID = 4.0 A Max RDS(on) = 60 mW at VGS = 1.5 V, ID = 2.0 A HBM ESD protection level > 1.5 kV (Note 3) These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Bottom Drain Contact D 1 6 D D 2 5 D G 3 4 S Typical Applications • • • • • Li−lon Battery Pack Baseband Switch Load Switch DC−DC Conversion Mobile Device Switching UDFN6 2.05x2,05 0.65P (MicroFET) CASE 517DT MARKING DIAGRAM &Z&2&K 410T &Z &2 &K 410T = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2016 December 2020 − Rev. 2 1 Publication Order Number: FDMA410NZT/D FDMA410NZT MAXIMUM RATINGS (TA = 25°C, Unless otherwise specified) Parameter Symbol Ratings Unit VDS Drain to Source Voltage 20 V VGS Gate to Source Voltage ±8 V –Continuous, TA = 25°C (Note 1a) 9.5 A –Pulsed (Note 4) 63 ID PD TJ, TSTG Power Dissipation, TA = 25°C (Note 1a) 2.4 Power Dissipation, TA = 25°C (Note 1b) 0.9 W °C −55 to +150 Operating and Storage Junction Temperature Range Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL CHARACTERISTICS Symbol Parameter Ratings Unit °C/W RqJA Thermal Resistance, Junction to Ambient (Note 1a) 52 RqJA Thermal Resistance, Junction to Ambient (Note 1b) 145 PACKAGE MARKING AND ORDERING INFORMATION Device Marking Pin 1 Orientation Device Package Reel Size Tape Width Shipping (Qty / Packing)† 410T FDMA410NZT MicroFET 2x2 7″ 8 mm 3000 / Tape & Reel Top left 410T FDMA410NZT−F130 MicroFET 2x2 7″ 8 mm 3000 / Tape & Reel Top right †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Unit OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V 20 − − V DBV DSS DT J Breakdown Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C − 15 − mV/°C IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V − − 1 mA IGSS Gate to Source Leakage Current VGS = ±8 V, VDS = 0 V − − ±10 mA 0.4 0.8 1.0 V ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA DV GS(th) DT J Gate to Source Threshold Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C − −3 − mV/°C RDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 9.5 A − 14 23 mW VGS = 2.5 V, ID = 8.0 A − 18 29 VGS = 1.8 V, ID = 4.0 A − 25 36 VGS = 1.5 V, ID = 2.0 A − 35 60 VGS = 4.5 V, ID = 9.5 A, TJ = 125°C − 21 32 VDD = 5 V, ID = 9.5 A − 36 − gFS Forward Transconductance www.onsemi.com 2 S FDMA410NZT ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Unit − 935 1310 pF DYNAMIC CHARACTERISTICS VDS = 10 V, VGS = 0 V, f = 1 MHz Ciss Input Capacitance Coss Output Capacitance − 122 170 pF Crss Reverse Transfer Capacitance − 84 118 pF 0.1 1.4 3.0 W − 8.5 17 ns − 3.0 10 Turn−off Delay Time − 27 44 Fall Time − 3.3 10 − 10 14 Rg Gate Resistance f = 1 MHz SWITCHING CHARACTERISTICS td(on) tr td(off) tf Turn−on Delay Time Rise Time VDD = 10 V, ID = 9.5 A, VGS = 4.5 V, RGEN = 6 W VGS = 4.5 V, VDD = 10 V, ID = 9.5 A nC Qg Total Gate Charge Qgs Gate to Source Charge − 1.2 − Qgd Gate to Drain “Miller” Charge − 2.0 − − − 2.0 A DRAIN−SOURCE DIODE CHARACTERISTICS IS VSD Maximum Continuous Drain−Source Diode Forward Current Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2 A (Note 2) − 0.7 1.2 V trr Reverse Recovery Time IF = 9.5 A, di/dt = 100 A/ms − 16 30 ns Qrr Reverse Recovery Charge − 4.5 10 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. NOTES: 1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RθJA is determined by the user’s board design. a) 52°C/W when mounted on a 1 in2 pad of 2 oz copper. b) 145°C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%. 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4. Pulsed Id please refer to Figure 11 SOA curve for more details. www.onsemi.com 3 FDMA410NZT TYPICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) NORMALIZED DRAIN TO SOURCE ON–RESISTANCE VGS = 3.5 V 60 VGS = 2.5 V 40 20 0 NORMALIZED DRAIN TO SOURCE ON–RESISTANCE 3 VGS = 4.5 V PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VGS = 1.8 V VGS = 1.5 V 0.0 0.5 1.0 1.5 VGS = 1.5 V VGS = 1.8 V VGS = 2.5 V 2 VGS = 3.5 V VGS = 4.5 V 1 0 2.0 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 0 20 Figure 1. On Region Characteristics Figure 2. Normalized On−Resistance vs. Drain Current and Gate Voltage 100 ID = 9.5 A VGS = 4.5 V 1.6 1.4 1.2 1.0 0.8 0.6 −75 −50 −25 0 25 50 80 60 40 TJ = 1255C 20 TJ = 255C 0 75 100 125 150 1 2 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 80 TJ = 1505C TJ = 255C TJ = −555C 20 1 2 3 4 5 Figure 4. On-Resistance vs. Gate to Source Voltage PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VDS = 5 V 40 3 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs. Junction Temperature 60 80 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX ID = 9.5 A TJ, JUNCTION TEMPERATURE (5C) 80 60 ID, DRAIN CURRENT (A) 1.8 0 40 VDS, DRAIN TO SOURCE VOLTAGE (V) RDS(on), DRAIN TO SOURCE ON-RESISTANCE (mW) ID, DRAIN CURRENT (A) 80 VGS = 0 V 10 TJ = 1505C 1 TJ = 255C 0.1 TJ = −555C 0.01 0.001 0.0 4 0.3 0.6 0.9 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current www.onsemi.com 4 1.5 FDMA410NZT TYPICAL CHARACTERISTICS (continued) 2000 4.5 3.0 VDD = 8 V VDD = 12 V 1.5 0.0 1000 VDD = 10 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) ID = 9.5 A 0 1 2 3 4 5 6 Coss 100 Crss f = 1 MHz VGS = 0 V 10 0.1 7 1 10 Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage Ig, GATE LEAKAGE CURRENT (A) 20 IAS, AVALANCHE CURRENT (A) Ciss 10 TJ = 255C TJ = 1005C TJ = 1255C 1 0.01 0.1 1 10 100 10 VDS = 0 V 1 TJ = 1255C −1 10 −2 10 TJ = 255C −3 10 −4 10 −5 10 0 2 4 6 Figure 10. Gate Leakage Current vs. Gate to Source Voltage Figure 9. Unclamped Inductive Switching Capability 100 1000 SINGLE PULSE 10 P(PK), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 10 ms 100 ms 1 ms THIS AREA IS 10 ms LIMITED BY RDS(on) 0.1 8 VGS, GATE TO SOURCE VOLTAGE (V) tAV, TIME IN AVALANCHE (ms) 1 20 SINGLE PULSE TJ = MAX RATED RqJA = 1455C/W 1s CURVE BENT TO MEASURED DATA TA = 255C 0.01 0.1 100 ms 1 10 s DC 10 100 TA = 255C 10 1 0.1 −5 10 50 RqJA = 1455C/W VDS, DRAIN TO SOURCE VOLTAGE (V) −4 10 10 −3 10 −2 10 −1 10 0 10 1 100 1000 t, PULSE WIDTH (sec) Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation www.onsemi.com 5 FDMA410NZT TYPICAL CHARACTERISTICS (continued) R(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 DUTY CYCLE−DESCENDING ORDER 1 10 10 D = 0.5 0.2 0.1 0.05 0.02 0.01 −1 −2 PDM t1 t2 10 10 −3 NOTES: SINGLE PULSE ZqJA(t) = R(t) x RqJA RqJA = 1455C/W Peak TJ = PDM x ZqJA(t) + TA Duty Cycle, D = t1 / t2 −4 10 −6 10 −5 10 −4 10 −3 10 −2 10 −1 1 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction−to−Case Transient Thermal Response Curve POWERTRENCH is registered trademark and MicroFET is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS UDFN6 2.05x2.05, 0.65P CASE 517DT ISSUE O DATE 31 OCT 2016 DOCUMENT NUMBER: STATUS: 98AON13698G ON SEMICONDUCTOR STANDARD NEW STANDARD: © Semiconductor Components Industries, LLC, 2002 October, DESCRIPTION: 2002 − Rev. 0 http://onsemi.com UDFN6 2.05x2.05, 0.65P 1 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. Case Outline Number: PAGE 1 OFXXX 2 DOCUMENT NUMBER: 98AON13698G PAGE 2 OF 2 ISSUE O REVISION RELEASED FOR PRODUCTION FROM FAIRCHILD FR015L3T TO ON SEMICONDUCTOR. REQ. BY C. TAN. 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