NTB082N65S3F

NTB082N65S3F MOSFET – N‐Channel, SUPERFET III, FRFET 650 V, 40 A, 82 mW Description SUPERFET III MOSFET is ON Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SUPERFET III MOSFET is very suitable for the various power system for miniaturization and higher efficiency. SUPERFET III FRFET MOSFET’s optimized reverse recovery performance of body diode can remove additional component and improve system reliability. VDSS RDS(ON) MAX ID MAX 650 V 82 mW @ 10 V 40 A D G Features • • • • • • www.onsemi.com 700 V @ TJ = 150°C Typ. RDS(on) = 70 mW Ultra Low Gate Charge (Typ. Qg = 81 nC) Low Effective Output Capacitance (Typ. Coss(eff.) = 722 pF) 100% Avalanche Tested These Devices are Pb−Free and are RoHS Compliant S D G Applications • • • • Telecom / Server Power Supplies Industrial Power Supplies EV Charger UPS / Solar S D2PAK−3 CASE 418AJ MARKING DIAGRAM $Y&Z&3&K NTB 082N65S3F $Y &Z &3 &K NTB082N65S3F = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2017 August, 2019 − Rev. 4 1 Publication Order Number: NTB082N65S3F/D NTB082N65S3F ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise specified) Symbol Parameter VDSS Drain to Source Voltage VGSS Gate to Source Voltage ID Drain Current Value Unit 650 V DC ±30 V AC (f > 1 Hz) ±30 V Continuous (TC = 25°C) 40 A Continuous (TC = 100°C) 25.5 Pulsed (Note 1) IDM Drain Current 100 A EAS Single Pulsed Avalanche Energy (Note 2) 510 mJ IAS Avalanche Current (Note 2) 4.8 A EAR Repetitive Avalanche Energy (Note 1) 3.13 mJ dv/dt MOSFET dv/dt 100 V/ns Peak Diode Recovery dv/dt (Note 3) 50 PD TJ, TSTG TL Power Dissipation (TC = 25°C) 313 W Derate Above 25°C 2.5 W/°C −55 to +150 °C 300 °C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. IAS = 4.8 A, RG = 25 W, starting TJ = 25°C. 3. ISD £ 20 A, di/dt ≤ 100 A/ms, VDD ≤ 400 V, starting TJ = 25°C. THERMAL CHARACTERISTICS Symbol RqJC RqJA Parameter Value Thermal Resistance, Junction to Case, Max. Thermal Resistance, Junction to Ambient (1 0.4 in2 Pad of 2−oz Copper), Max. 62.5 Unit _C/W PACKAGE MARKING AND ORDERING INFORMATION Part Number NTB082N65S3F Top Marking Package NTB082N65S3F D2PAK Packing Method Tape and Reel† Reel Size Tape Width Quantity 330 mm 24 mm 800 Units †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 2 NTB082N65S3F ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit VGS = 0 V, ID = 1 mA, TJ = 25_C 650 − − V VGS = 0 V, ID = 1 mA, TJ = 150_C 700 − − V OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage DBVDSS/DTJ Breakdown Voltage Temperature Coefficient ID = 10 mA, Referenced to 25_C − 0.7 − V/_C IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V − − 10 mA VDS = 520 V, TC = 125_C − 124 − IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V − − ±100 nA 3.0 − 5.0 V ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VGS = VDS, ID = 1.0 mA RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 20 A − 70 82 mW Forward Transconductance VDS = 20 V, ID = 20 A − 24 − S VDS = 400 V, VGS = 0 V, f = 1 MHz − 3410 − pF − 70 − pF gFS DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 722 − pF Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 126 − pF Total Gate Charge at 10V VDS = 400 V, ID = 20 A, VGS = 10 V (Note 4) − 81 − nC − 24 − nC Qg(tot) Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ESR Equivalent Series Resistance − 32 − nC f = 1 MHz − 1.9 − W VDD = 400 V, ID = 20 A, VGS = 10 V, Rg = 3 W (Note 4) − 27 − ns − 27 − ns SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time − 79 − ns Turn-Off Fall Time − 5 − ns Maximum Continuous Source to Drain Diode Forward Current − − 40 A ISM Maximum Pulsed Source to Drain Diode Forward Current − − 100 A VSD Source to Drain Diode Forward Voltage VGS = 0 V, ISD = 20 A − − 1.3 V trr Reverse Recovery Time − 108 − ns Qrr Reverse Recovery Charge VGS = 0 V, ISD = 20 A, dIF/dt = 100 A/ms − 410 − nC tf SOURCE-DRAIN DIODE CHARACTERISTICS IS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially independent of operating temperature typical characteristics. www.onsemi.com 3 NTB082N65S3F TYPICAL PERFORMANCE CHARACTERISTICS 200 10 *Notes: 1. VDS = 20 V 2. 250 ms Pulse Test 100 ID, Drain Current [A] ID, Drain Current [A] 200 VGS = 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 100 1 o 150 C 10 o 25 C o −55 C *Notes: 1. 250 ms Pulse Test o 2. TC = 25 C 0.1 0.1 1 10 VDS, Drain−Source Voltage [V] 1 20 2 3 Figure 1. On-Region Characteristics 0.20 IS, Reverse Drain Current [A] RDS(ON), Drain−Source On−Resistance [W ] VGS = 10 V VGS = 20 V 0.05 0 20 40 7 8 9 60 80 100 *Notes: 1. VGS = 0 V 100 2. 250 ms Pulse Test o 150 C 10 o 25 C 1 o 0.1 −55 C 0.01 0.001 0.0 120 0.5 1.0 1.5 2.0 ID, Drain Current [A] VSD, Body Diode Forward Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 10 10000 VGS, Gate−Source Voltage [V] 100000 Capacitances [pF] 6 1000 o 0.15 0.00 5 Figure 2. Transfer Characteristics *Note: T C = 25 C 0.10 4 VGS, Gate−Source Voltage [V] Ciss 1000 Coss 100 *Note: 1. VGS = 0 V 2. f = 1 MHz 10 1 Crss Ciss = C gs + Cgd (C ds = shorted) Coss = C ds + Cgd Crss = Cgd 0.1 0.1 1 10 100 VDS = 130 V 8 VDS = 400 V 6 4 2 0 1000 *Note: ID = 20 A 0 20 40 60 80 100 Qg, Total Gate Charge [nC] VDS, Drain−Source Voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics www.onsemi.com 4 NTB082N65S3F TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 3.0 *Notes: 1. VGS = 0 V 2. ID = 10 mA 1.1 RDS(on), [Normalized] Drain−Source On−Resistance BVDSS, [Normalized] Drain−Source Breakdown Voltage 1.2 1.0 0.9 0.8 −50 0 50 100 2.0 1.5 1.0 0.5 0.0 150 −50 0 50 100 150 TJ, Junction Temperature [ o C] TJ, Junction Temperature [ o C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variant vs. Temperature 50 200 100 30ms 40 100ms ID, Drain Current [A] ID, Drain Current [A] 2.5 *Notes: 1. VGS = 10 V 2. I D = 20 A 1ms 10 10ms Operation in This Area is Limited by R DS(on) 1 DC *Notes: o 30 20 10 1. TC = 25 C o 0.1 2. TJ = 150 C 3. Single Pulse 1 10 100 0 25 1000 Figure 9. Maximum Safe Operation Area EOSS [mJ] 16 12 8 4 0 130 260 390 520 75 100 125 150 Figure 10. Maximum Drain Current vs. Case Temperature 20 0 50 TC, Case Temperature [oC] VDS , Drain−Source Voltage [V] 650 VDS, Drain to Source Voltage [V] Figure 11. EOSS vs. Drain to Source Voltage www.onsemi.com 5 NTB082N65S3F r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 2 1 0.1 DUTY CYCLE−DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 0.001 −5 10 NOTES: ZqJC(t) = r(t) x RqJC RqJC = 0.4 oC/W Peak TJ = PDM x ZqJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE −4 10 −3 10 −2 −1 10 10 0 10 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Transient Thermal Response Curve www.onsemi.com 6 1 10 2 10 NTB082N65S3F VGS RL QG VDS VGS QGS QGD DUT IG = Const. Charge Figure 13. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr tf td(off) ton toff Figure 14. Resistive Switching Test Circuit & Waveforms L E AS + 1 @ LI AS 2 VDS BVDSS ID IAS RG VDD DUT 10 V 2 ID(t) VDD VDS(t) tp tp Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time NTB082N65S3F + DUT VSD − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 16. Peak Diode Recovery dt/dt Test Circuit & Waveforms SUPERFET and FRFET are a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE F SCALE 1:1 GENERIC MARKING DIAGRAMS* XX XXXXXXXXX AWLYWWG IC DOCUMENT NUMBER: DESCRIPTION: XXXXXXXXG AYWW Standard 98AON56370E AYWW XXXXXXXXG AKA Rectifier XXXXXX XXYMW SSG DATE 11 MAR 2021 XXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week W = Week Code (SSG) M = Month Code (SSG) G = Pb−Free Package AKA = Polarity Indicator *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. D2PAK−3 (TO−263, 3−LEAD) PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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