ESDARF02-1BU2CK
Single-line bidirectional ESD protection for high speed interface
Datasheet production data
Features
Bidirectional device
Extra low diode capacitance: 0.2 pF
Very high bandwidth: 30 GHz
Low leakage current
0201 SMD package size compatible
Ultra small PCB area: 0.18 mm2
ECOPACK®2 and RoHS compliant component
Pin1 available in different shapes
ST0201 package
Complies with the following standards:
Figure 1. Functional diagram (top view)
Pin1
IEC 61000-4-2 level 4
– 15 kV (air discharge)
– 8 kV (contact discharge)
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
Smartphones, mobile phone and accessories
Tablet PCs, netbooks and notebooks
Portable multimedia devices and accessories
Digital cameras and camcorders
Communication and highly integrated systems
Description
The ESDARF02-1BU2CK is a bidirectional single
line TVS diode designed to protect the data lines
or other I/O ports against ESD transients.
The device is ideal for applications where both
reduced line capacitance and board space saving
are required.
January 2017
This is information on a product in full production.
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www.st.com
Characteristics
1
ESDARF02-1BU2CK
Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
Value
Unit
VPP
Peak pulse voltage:
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
8
20
kV
PPP
Peak pulse power (8/20 µs)
20
W
IPP
Peak pulse current (8/20 µs)
1.5
A
Tj
Operating junction temperature range
-40 to +150
°C
Tstg
Storage temperature range
-65 to +150
°C
TL
Maximum lead temperature for soldering during 10 s
260
°C
Note:
For a surge greater than the maximum values, the diode will fail in short-circuit
Figure 2. Electrical characteristics (definitions)
Symbol
VBR
VRM
IRM
IPP
=
=
=
=
Parameter
Breakdown voltage
Stand-off voltage
Leakage current @ VRM
Peak pulse current
Rd
aT
C
=
=
=
Dynamic impedance
Voltage temperature coefficient
Parasite capacitance
Table 2. Electrical characteristics (values, Tamb = 25 °C)
Symbol
Min.
Typ.
5
6.6
Max.
Unit
VBR
IR = 1 mA
IRM
VRM = 3.6 V
5
100
nA
VCL
IPP = 1 A, 8/20 µA
10
12
V
Rd
Dynamic resistance, pulse duration 100 ns
1.3
F = (200 MHz- 3000 MHz), VR = 0 V
0.2
-3 dB
30
Cline
fc
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Test Condition
DocID025014 Rev 3
V
Ω
0.3
pF
GHz
ESDARF02-1BU2CK
Characteristics
Figure 3. Leakage current versus junction
temperature (typical values)
100
IR(nA)
Figure 4. Junction capacitance versus
frequency (typical values)
0,5
VR = VRM = 3.6 V
I/O / GND
C(pF)
Tj = 25 °C
Vosc = 30mV
Direct Reverse
0,4
0,3
10
0,2
0,1
Tj(°C)
1
25
50
75
100
125
F(MHz)
150
Figure 5. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
0,0
1,00
10,00
100,00
1000,00
Figure 6. JESD response to IEC 61000-4-2
(-8 kV contact discharge)
50 V/div
50 V/div
242 V 1
-12 V4
VPP: ESD peak voltage
VCL :clamping voltage at 30 ns
3 V :clamping voltage at 60 ns
CL
4 VCL :clamping voltage at 100 ns
1
2
19 V
2
17 V
3
15 V
-16 V 3
-20 V 2
VPP: ESD peak voltage
VCL :clamping voltage at 30 ns
VCL :clamping voltage at 60 ns
4 VCL :clamping voltage at 100 ns
1
2
3
4
-241 V 1
20 ns/div
20 ns/div
Figure 7. S21 attenuation measurement results
G%
Figure 8. TLP measurements
25
IPP(A)
20
Positive polarity
Negative polarity
15
10
5
)+]
VCL(V)
0
0
(6'$5)%8&.
*
*
*
0
0
5
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15
20 25
30
35
40 45
50
55 60
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Package information
2
ESDARF02-1BU2CK
Package information
Epoxy meets UL94, V0
Bar indicates pin 1
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1
ST0201 package information
Figure 9. ST0201 package outline
D
E
Top
A
Side
b1
b2
L1
L2
Bottom
Pin 1
b1
e
b2
L1
L2
Bottom
e
Pin 1 available in different shapes
Table 3. 0201 package mechanical data
Dimensions
Ref.
Millimeters
Min.
Typ.
A
0.23
b1
0.20
Max.
Min.
Typ.
Max.
0.28
0.33
0.25
0.30
0.0091
0.0110
0.0130
0.0079
0.0098
0.0118
b2
0.20
0.25
0.30
0.0079
0.0098
0.0118
D
0.55
0.60
0.65
0.0217
0.0236
0.0256
E
0.25
0.30
0.35
0.0099
0.0118
0.0138
e
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Inches
0.35
0.0138
L1
0.13
0.18
0.23
0.0052
0.0071
0.0091
L2
0.14
0.19
0.24
0.0055
0.0075
0.0095
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ESDARF02-1BU2CK
Package information
Figure 10. Footprint, dimensions in mm
(inches)
0.656
(0.0258)
0.243
(0.0096)
Figure 11. Marking
0.243
(0.0096)
Z3
Pin2
0.300
(0.0118)
Pin 1
0.170
(0.0067)
Product marking may be rotated by 180° for assembly plant differentiation. In no case
should this product marking be used to orient the component for its placement on a PCB.
Only pin 1 mark is to be used for this purpose.
Figure 12. Tape and reel outline
Bar indicates Pin 1
2.0
Ø 1.55
4.0
Z3
Z3
Z3
Z3
Z3
Z3
3.5
0.67
1.75
0.22
8.0
Note:
2.0
0.38
0.34
All dimensions are typical values in mm
User direction of unreeling
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Recommendation on PCB assembly
ESDARF02-1BU2CK
3
Recommendation on PCB assembly
3.1
Stencil opening design
Figure 13. Recommended stencil windows-opening 90%/Thickness 80µm (all
dimensions are in mm)
0.230
(0.0091)
0.643
(0.0253)
0.183
(0.0072)
0.285
(0.0112)
0.008
(0.0003)
0.300
(0.0118)
0.008
(0.0003)
0.656
(0.0258)
0.007
0.007
(0.00027) (0.00027)
0.170
(0.0067)
0.243
(0.0096)
mm
(inches)
Footprint
3.2
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Stencil window
Solder paste
1.
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste is recommended.
3.
Offers a high tack force to resist component displacement during PCB movement.
4.
Use solder paste with fine particles: Type4 (powder particle size is 20-45 µm).
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ESDARF02-1BU2CK
3.3
3.4
3.5
Recommendation on PCB assembly
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering
3.
Standard tolerance of ±0.05 mm is recommended.
4.
1.0 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Reflow profile
Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting
240-245 °C
Temperature (°C)
250
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement.
Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020.
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Ordering information
4
ESDARF02-1BU2CK
Ordering information
Figure 15. Ordering information scheme
ESDA
RF 02 - 1B U2 CK
ESDA array
Application
RF antenna
Number of lines
Direction
B = Bidirectional
Package
U2 = ST0201
C = Low clamping ESD protection
Table 4. Ordering information
Order code
Marking
Weight
Base qty.
Delivery mode
ESDARF02-1BU2CK
Z3(1)
0.124 mg
15000
Tape and reel
1. The marking can be rotated by 180° to differentiate assembly location
5
Revision history
Table 5. Document revision history
8/9
Date
Revision
Changes
25-Feb-2015
1
Initial release.
02-Jun-2016
2
Updated Features.
Updated Table 2 and reformatted to current standard.
23-Jan-2017
3
Updated Table 3.
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ESDARF02-1BU2CK
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improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
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acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2017 STMicroelectronics – All rights reserved
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