ESDZV5HS-1BF4
Datasheet
Ultra-low clamping single line bidirectional ESD protection
Features
•
•
•
•
•
Ultra-low clamping voltage:
–
10 V (IEC 61000-4-2 contact discharge 8 kV at 30 ns / 16 A TLP)
Bidirectional and symmetrical device
High holding voltage for DC line protection
0201 WLCSP package
Complies with the following standards: IEC 61000-4-2 level 4
–
±15 kV (air discharge)
–
±10 kV (contact discharge)
•
ECOPACK®2 compliant component
0201 WLCSP package
Application
Where transient over voltage protection in ESD sensitive equipment is required, such
as:
•
Smartphones, mobile phones and accessories
•
Tablet and notebooks
•
Portable multimedia devices and accessories
•
Wearable, home automation, healthcare
•
Highly integrated systems
Product status link
ESDZV5HS-1BF4
Description
The ESDZV5HS-1BF4 is a bidirectional single line TVS diode designed to protect the
data line or other I/O ports against ESD transients.
The device is ideal for applications where both reduced line capacitance and board
space saving are required.
DS12364 - Rev 3 - June 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
ESDZV5HS-1BF4
Characteristics
1
Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
Value
IEC 61000-4-2 contact discharge
±10
IEC 61000-4-2 air discharge
±15
Unit
Vpp
Peak pulse voltage
Ppp
Peak pulse power (8/20 μs)
40
W
Ipp
Peak pulse current (8/20 μs)
4
A
Tj
Operating junction temperature range
-55 to +150
Storage junction temperature range
-65 to +150
Tstg
TL
Maximum lead temperature for soldering during 10 s
kV
°C
260
Figure 1. Electrical characteristics (definitions)
I
Symbol
Parameter
VRM
Stand-off voltage
VCL
Clamping voltage
RD
VH
Holding voltage
IRM
Leakage current at VRM
IPP
Peak pulse current
VTrig
Triggering voltage
Cline
Input capacitance per line
RD
Dynamic resistance
VCL VTrig VBR VRM
V
IRM
IR
IPP
Table 2. Electrical characteristics (values) (Tamb = 25° C)
Symbol
Min.
Typ.
Max.
Unit
Vtrig
10
12
13.5
V
VH
6.5
7
Test condition
IRM
Leakage current
VCL
Clamping voltage
RD
Dynamic resistance, pulse duration 100 ns
CLINE
DS12364 - Rev 3
Parameter
Line capacitance
VRM = 5.5 V
IEC 61000-4-2, 8 kV
contact discharge measured after 30 ns
VLINE = 0 V, F = 1 MHz, VOSC = 30 mV
V
100
nA
10
V
0.18
Ω
4
4.5
pF
page 2/10
ESDZV5HS-1BF4
Characteristics (curves)
1.1
Characteristics (curves)
Figure 2. Variation of leakage current versus junction
temperature (typical values)
Figure 3. Junction capacitance versus frequency
C(pF)
4.5
IR(nA)
120
4.0
3.5
100
3.0
80
2.5
2.0
60
1.5
40
1.0
20
0
0.5
Tj(°C)
25
50
75
100
125
150
Figure 4. ESD response to IEC 61000-4-2 (+8 kV contact
discharge)
V(V)
0.0
0
1
2
3
4
5
Figure 5. ESD response to IEC 61000-4-2 (-8 kV contact
discharge)
Figure 6. TLP
Figure 7. S21 attenuation
20
TLP current (A)
18
16
14
12
10
8
6
4
2
0
TLP voltage (V)
0
DS12364 - Rev 3
2
4
6
8
10
12
14
16
page 3/10
ESDZV5HS-1BF4
Package information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®
packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions
and product status are available at: www.st.com. ECOPACK® is an ST trademark.
2.1
0201 WLCSP package information
Figure 8. 0201 WLCSP package outline
Table 3. 0201 WLCSP package mechanical data
Dimensions
Millimeters
Ref.
Min.
Max.
A
0.270
0.300
0.330
b
0.1675
0.1875
0.2075
D
0.560
0.580
0.600
D1
DS12364 - Rev 3
Typ.
0.3375
E
0.260
0.280
0.300
E1
0.205
0.225
0.245
fD
0.0175
0.0275
0.0375
fE
0.0175
0.0275
0.070
page 4/10
ESDZV5HS-1BF4
0201 WLCSP package information
Figure 9. Marking
U
Pin 1
Pin 2
Figure 10. Tape and reel specification
Bar indicates Pin 1
DS12364 - Rev 3
page 5/10
ESDZV5HS-1BF4
Recommendation on PCB assembly
3
Recommendation on PCB assembly
3.1
Footprint
Figure 11. Footprint in mm
3.2
Stencil opening design
1.
Recommended design reference
a.
Stencil opening dimensions: 75 µm / 3 mils
Figure 12. Stencil opening recommendations
DS12364 - Rev 3
page 6/10
ESDZV5HS-1BF4
Solder paste
3.3
Solder paste
1.
2.
3.
4.
3.4
Placement
1.
2.
3.
4.
5.
6.
3.5
Manual positioning is not recommended.
It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
Standard tolerance of ±0.05 mm is recommended.
1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
PCB design preference
1.
2.
3.6
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during high speed.
Use solder paste with fine particles: powder particle size 20-38 µm.
To control the solder paste amount, the closed via is recommended instead of open vias.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
Reflow profile
Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting
250
240-245 °C
Temperature (°C)
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
DS12364 - Rev 3
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile
corresponds to the latest IPC/JEDEC J-STD-020.
page 7/10
ESDZV5HS-1BF4
Ordering information
4
Ordering information
Figure 15. Ordering information scheme
ESDZV5HS - 1
B F4
ESD protection
Z: Ultra-low clamping snapback effect
V: Very low capacitance
5: Stand-off voltage at 5.5 V min
HS : Higher holding voltage symmetrical version
Number of lines
B = Birectional
Package
F4 = 0201 WLCSP
Table 4. Ordering information
DS12364 - Rev 3
Order code
Marking
Package
Weight
Base qty.
Delivery mode
ESDZV5HS-1BF4
U
0201 WLCSP
0.116 mg
15000
Tape and reel
page 8/10
ESDZV5HS-1BF4
Revision history
Table 5. Document revision history
DS12364 - Rev 3
Date
Revision
Changes
02-Nov-2017
1
Initial release.
16-Feb-2018
2
Updated Table 3: "0201 package mechanical data".
28-Jun-2018
3
Updated package information naming.
page 9/10
ESDZV5HS-1BF4
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STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2018 STMicroelectronics – All rights reserved
DS12364 - Rev 3
page 10/10
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