STD70N2LH5
STU70N2LH5
N-channel 25 V, 0.006 Ω, 48 A - DPAK - IPAK
STripFET™ V Power MOSFET
Preliminary Data
Features
Type
VDSS
RDS(on) max
ID
STD70N2LH5
25 V
0.0071 Ω
48 A
STU70N2LH5
25 V
0.0075 Ω
48 A
)
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■
RDS(on) * Qg industry benchmark
■
Extremely low on-resistance RDS(on)
■
Very low switching gate charge
■
High avalanche ruggedness
■
Low gate drive power losses
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IPAK
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Application
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DPAK
2
1
Switching applications
Description
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Figure 1.
Internal schematic diagram
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This product utilizes the 5th generation of design
rules of ST’s proprietary STripFET™ technology.
The lowest available RDS(on)*Qg, in the standard
packages, makes this device suitable for the most
demanding DC-DC converter applications, where
high power density is to be achieved.
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Table 1.
Device summary
Order codes
Marking
Package
Packaging
STD70N2LH5
70N2LH5
DPAK
Tape & reel
STU70N2LH5
70N2LH5
IPAK
Tube
September 2008
Rev 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/12
www.st.com
12
Electrical ratings
1
STD70N2LH5 - STU70N2LH5
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
25
V
± 22
V
Drain-source voltage (VGS=0)
VGS
Gate-Source voltage
ID (1)
Drain current (continuous) at TC = 25 °C
48
A
ID
Drain current (continuous) at TC = 100 °C
43
A
IDM (2)
Drain current (pulsed)
192
PTOT
Total dissipation at TC = 25 °C
60
Single pulse avalanche energy
Tj
Operating junction temperature
Storage temperature
1. Limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting Tj = 25 °C, ID = 24 A, VDD = 12 V
Table 3.
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0.4
EAS (3)
Tstg
W
W/°C
TBD
mJ
-55 to 175
°C
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Thermal resistance
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Symbol
Parameter
Value
Unit
Rthj-case
Thermal resistance junction-case max
2.5
°C/W
Rthj-amb
od
Thermal resistance junction-case max
100
°C/W
Maximum lead temperature for soldering purpose
275
°C
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Tj
2/12
Unit
VDS
Derating factor
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Value
Pr
STD70N2LH5 - STU70N2LH5
2
Electrical characteristics
Electrical characteristics
(TCASE = 25°C unless otherwise specified)
Table 4.
Static
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
Voltage
Min.
ID = 250 µA, VGS= 0
IGSS
Gate body leakage current
(VDS = 0)
VGS = ± 22 V
Gate threshold voltage
VDS= VGS, ID = 250 µA
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SMD version
Static drain-source on
resistance
let
VGS= 10 V, ID= 24 A
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VGS= 5 V, ID= 24 A
SMD version
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VGS= 5 V, ID= 24 A
Table 5.
Symbol
Ciss
)
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Dynamic
Parameter
Test conditions
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25 V, f=1 MHz,
VGS=0
Total gate charge
Gate-source charge
Gate-drain charge
VGS =5 V
Pre Vth gate-to-source
charge
Post Vth gate-to-source
charge
VGS =5 V
Gate input resistance
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Coss
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Crss
Qg
Qgs
Qgd
Qgs1
Qgs2
RG
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1
1
10
µA
µA
±100
nA
)
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VDS = 25 V, TC = 125 °C
VGS= 10 V, ID= 24 A
V
0.0071
Ω
0.0064 0.0075
Ω
0.008
Ω
0.006
0.01
0.0084 0.0104
Min
Unit
V
VDS = 25 V
Zero gate voltage drain
current (VGS = 0)
RDS(on)
Max.
25
IDSS
VGS(th)
Typ.
Typ.
Max.
Ω
Unit
1300
300
50
pF
pF
pF
(Figure 3)
8
TBD
TBD
nC
nC
nC
VDD=15 V, ID = 48 A
TBD
nC
(Figure 8)
TBD
nC
f=1 MHz gate bias
Bias= 0 test signal
level=20 mV
open drain
1.1
Ω
VDD=15 V, ID = 48 A
3/12
Electrical characteristics
Table 6.
STD70N2LH5 - STU70N2LH5
Switching on/off (resistive load)
Symbol
td(on)
tr
td(off)
tf
Parameter
RG=4.7 Ω, VGS= 10 V
(Figure 2 and Figure 7)
VDD=10 V, ID= 24 A,
Turn-off delay time
Fall time
RG=4.7 Ω, VGS= 10 V
(Figure 2 and Figure 7)
Parameter
Test conditions
Source-drain current (pulsed)(1)
VSD
Forward on voltage
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
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Max.
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ISD=48 A,
di/dt =100 A/µs,
VDD=20 V, Tj = 25 °C
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(Figure 4)
Unit
TBD
TBD
ns
ns
TBD
TBD
ns
ns
)
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Typ.
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ISD=24 A, VGS=0
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
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Min.
Source-drain current
ISDM
Qrr
Typ.
Source drain diode
Symbol
trr
Min.
VDD=10 V, ID= 24 A,
Turn-on delay time
Rise time
Table 7.
ISD
Test conditions
TBD
TBD
TBD
Max.
Unit
48
192
A
A
1.1
V
ns
nC
A
STD70N2LH5 - STU70N2LH5
Test circuit
3
Test circuit
Figure 2.
Switching times test circuit for
resistive load
Figure 3.
Gate charge test circuit
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Figure 4.
Test circuit for inductive load
Figure 5.
switching and diode recovery times
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Unclamped Inductive load test
circuit
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Figure 6.
Unclamped inductive waveform
Figure 7.
Switching time waveform
5/12
Test circuit
Figure 8.
STD70N2LH5 - STU70N2LH5
Gate charge waveform
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6/12
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STD70N2LH5 - STU70N2LH5
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data
STD70N2LH5 - STU70N2LH5
DPAK MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
A1
A2
B
b4
C
C2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
TYP
2.2
0.9
0.03
0.64
5.2
0.45
0.48
6
MAX.
MIN.
2.4
1.1
0.23
0.9
5.4
0.6
0.6
6.2
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
TYP.
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
5.1
6.4
6.6
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1
0°
8°
)
(s
0.173
0.368
0.039
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2.8
0.8
0.2
u
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0.252
4.6
10.1
0.6
)
s
(
ct
0.200
4.7
2.28
4.4
9.35
1
MAX.
Pr
0.185
0.090
0.181
0.397
0.110
0.031
0.023
0°
0.260
0.039
0.008
8°
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0068772-F
8/12
STD70N2LH5 - STU70N2LH5
Package mechanical data
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
B5
0.033
0.3
0.012
B6
)
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0.95
0.037
C
0.45
0.6
0.017
C2
0.48
0.6
0.019
D
6
6.2
0.236
E
6.4
6.6
0.252
G
4.4
4.6
0.173
H
15.9
16.3
0.626
L
9
9.4
0.354
L1
0.8
1.2
L2
0.8
0.023
0.023
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0.181
0.641
0.370
0.031
1
0.244
0.260
0.047
0.031
0.039
L2
A3
B
G
=
1
=
2
=
3
=
=
B2
=
E
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D
B3
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A1
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B6
C2
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B5
A
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(s
C
H
L1
0068771-E
9/12
Packaging mechanical data
5
STD70N2LH5 - STU70N2LH5
Packaging mechanical data
DPAK FOOTPRINT
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All dimensions are in millimeters
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TAPE AND REEL SHIPMENT
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REEL MECHANICAL DATA
DIM.
)-
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TAPE MECHANICAL DATA
DIM.
10/12
inch
MIN.
MAX.
A0
6.8
7
0.267 0.275
B0
10.4
10.6
0.409 0.417
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Pr
mm
B1
D
1.5
D1
1.5
E
1.65
MIN.
MAX.
12.1
0.476
1.6
0.059 0.063
1.85
0.065 0.073
0.059
F
7.4
7.6
0.291 0.299
K0
2.55
2.75
0.100 0.108
0.153 0.161
P0
3.9
4.1
P1
7.9
8.1
0.311 0.319
P2
1.9
2.1
0.075 0.082
R
40
W
15.7
1.574
16.3
0.618
0.641
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mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
16.4
N
50
T
MAX.
inch
MIN.
MAX.
330
12.992
13.2
0.504 0.520
18.4
0.645 0.724
0.059
0.795
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
2500
STD70N2LH5 - STU70N2LH5
6
Revision history
Revision history
Table 8.
Document revision history
Date
Revision
Changes
16-Jan-2008
1
First release
23-Sep-2008
2
VGS value has been changed on Table 2 and Table 5
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STD70N2LH5 - STU70N2LH5
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Please Read Carefully:
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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
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Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
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