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STH110N10F7-6

STH110N10F7-6

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TO263-7

  • 描述:

    MOSFET N-CH 100V 110A H2PAK-6

  • 数据手册
  • 价格&库存
STH110N10F7-6 数据手册
STH110N10F7-2, STH110N10F7-6 N-channel 100 V, 4.9 mΩ typ.,110 A, STripFET™ F7 Power MOSFETs in H²PAK-2 and H²PAK-6 packages Datasheet - production data Features TAB TAB VDS RDS(on) max. ID PTOT 100 V 6.5 mΩ 110 A 150 W Order code 7 2 1 2 H PAK-2 3 STH110N10F7-2 1 2 H PAK-6 STH110N10F7-6 Figure 1: Internal schematic diagram     Among the lowest RDS(on) on the market Excellent figure of merit (FoM) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Applications  Switching applications Description These N-channel Power MOSFETs utilize STripFET™ F7 technology with an enhanced trench gate structure that results in very low onresistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. S(2,3,4,5,6,7) Table 1: Device summary Order code Marking 2 STH110N10F7-2 H PAK-2 110N10F7 STH110N10F7-6 November 2014 DocID024027 Rev 4 This is information on a product in full production. Package H2PAK-6 Packing Tape and reel 1/19 www.st.com Contents STH110N10F7-2, STH110N10F7-6 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 5 2/19 4.1 H2PAK-2 package information ......................................................... 10 4.2 H2PAK-6 package information ......................................................... 13 4.3 Packing information ......................................................................... 16 Revision history ............................................................................ 18 DocID024027 Rev 4 STH110N10F7-2, STH110N10F7-6 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 100 V VGS Gate-source voltage ± 20 V (1) ID Drain current (continuous) at TC = 25 °C 110 A (1) ID Drain current (continuous) at TC = 100 °C 76 A (2) ID Drain current (continuous) at Tpcb = 25 °C 18 A (2) ID Drain current (continuous) at Tpcb = 100 °C 13 A Drain current (pulsed) 430 A Total dissipation at TC = 25 °C 150 W EAS Single pulse avalanche energy 490 mJ TJ Operating junction temperature Tstg Storage temperature (3) IDM PTOT (1) (4) -55 to 175 °C °C Notes: (1) (2) (3) (4) This value is rated according to Rthj-c This value is rated according to Rthj-pcb Pulse width limited by safe operating area Starting TJ = 25 °C, ID = 18, VDD = 50 V Table 3: Thermal resistance Symbol Rthj-case Rthj-pcb (1) Parameter Value Unit Thermal resistance junction-case 1 °C/W Thermal resistance junction-pcb 35 °C/W Notes: (1) When mounted on FR-4 board of 1 inch², 2 oz Cu DocID024027 Rev 4 3/19 Electrical characteristics 2 STH110N10F7-2, STH110N10F7-6 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4: On/off-state Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage (VGS= 0) ID = 250 µA Min. Typ. Max. 100 Unit V VDS = 100 V 1 µA VDS = 100 V; TC = 125 °C 100 µA 100 nA 4.5 V 6.5 mΩ Max. Unit IDSS Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 55 A 2.5 4.9 Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Test conditions Min. VDS = 50 V, f = 1 MHz, VGS = 0 Typ. 5117 pF 992 pF 39 - Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge VDD = 50 V, ID = 110 A VGS = 10 V See Figure 14: "Gate charge test circuit" pF - 72 nC 31 nC 16 nC Table 6: Switching times Symbol td(on) tr td(off) tf 4/19 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 50 V, ID = 55 A, RG = 4.7 Ω, VGS= 10 V See Figure 13: "Switching times test circuit for resistive load" DocID024027 Rev 4 Min. Typ. Max. 25 ns 36 - 52 21 Unit ns - ns ns STH110N10F7-2, STH110N10F7-6 Electrical characteristics Table 7: Source-drain diode Symbol ISD (1) ISDM (2) VSD Parameter Test conditions Min. Typ. Source-drain current Source-drain current (pulsed) Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 55 A, VGS = 0 ISD = 110 A, di/dt = 100 A/µs, VDD = 80 V, Tj = 150 °C - Max. Unit 110 A 430 A 1.2 V 77 ns 150 nC 4.3 A Notes: (1) (2) Pulse width limited by safe operating area Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID024027 Rev 4 5/19 Electrical characteristics 2.1 STH110N10F7-2, STH110N10F7-6 Electrical characteristics (curves) Figure 3: Thermal impedance Figure 2: Safe operating area Zth_280TOL AM15947v1 ID (A) δ Tj=175°C Tc=25°C Single pulse 100 10 0.2 is ea ar (on) is th RDS in ax ion y m at er ed b p t i O m Li 0.1 100µs 0.05 0.02 1ms 1 0.01 10ms Single pulse 0.1 0.1 1 10 V DS(V) tp[s] Figure 5: Transfer characteristics Figure 4: Output characteristics Figure 6: Gate charge vs gate-source voltage 6/19 Figure 7: Static drain-source on-resistance DocID024027 Rev 4 STH110N10F7-2, STH110N10F7-6 Electrical characteristics Figure 8: Capacitance variations Figure 10: Normalized on-resistance vs temperature Figure 9: Normalized gate threshold voltage vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics DocID024027 Rev 4 7/19 Test circuits 3 STH110N10F7-2, STH110N10F7-6 Test circuits Figure 13: Switching times test circuit for resistive load Figure 14: Gate charge test circuit VDD 47 k Ω 12 V 1 kΩ 100 nF I G = CONST Vi ≤ V GS 100 Ω D.U.T. VG 2.7 k Ω 2200 μ F 47 k Ω PW 1 kΩ AM01469v 1 Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform t on V(BR)DSS t d(on) VD t off tr t d(off) tf 90% 90% I DM 10% ID VDD 10% 0 VDD VGS AM01472v 1 8/19 DocID024027 Rev 4 0 10% VDS 90% AM01473v 1 STH110N10F7-2, STH110N10F7-6 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. DocID024027 Rev 4 9/19 Package information 4.1 STH110N10F7-2, STH110N10F7-6 2 H PAK-2 package information Figure 19: H²PAK-2 outline 8159712_D 10/19 DocID024027 Rev 4 STH110N10F7-2, STH110N10F7-6 Package information Table 8: H²PAK-2 mechanical data mm Dim. Min. Typ. Max. A 4.30 4.80 A1 0.03 0.20 C 1.17 1.37 e 4.98 5.18 E 0.50 0.90 F 0.78 0.85 H 10.00 10.40 H1 7.40 L 15.30 L1 1.27 1.40 L2 4.93 5.23 L3 6.85 7.25 L4 1.5 1.7 M 2.6 2.9 R 0.20 0.60 V 0° 8° DocID024027 Rev 4 - 7.80 15.80 11/19 Package information STH110N10F7-2, STH110N10F7-6 Figure 20: H²PAK-2 recommended footprint 8159712_D 12/19 DocID024027 Rev 4 STH110N10F7-2, STH110N10F7-6 4.2 Package information 2 H PAK-6 package information Figure 21: H²PAK-6 outline 8159693_Rev_F DocID024027 Rev 4 13/19 Package information STH110N10F7-2, STH110N10F7-6 Table 9: H²PAK-6 mechanical data mm Dim. Min. 14/19 Typ. Max. A 4.30 4.80 A1 0.03 0.20 C 1.17 1.37 e 2.34 2.74 e1 4.88 5.28 e2 7.42 7.82 E 0.45 0.60 F 0.50 0.70 H 10.00 H1 7.40 L 14.75 15.25 L1 1.27 1.40 L2 4.35 4.95 L3 6.85 7.25 L4 1.5 1.75 M 1.90 2.50 R 0.20 0.60 V 0° 8° DocID024027 Rev 4 - 10.40 7.80 STH110N10F7-2, STH110N10F7-6 Package information Figure 22: H²PAK-6 recommended footprint footprint_Rev_F Dimensions are in mm. DocID024027 Rev 4 15/19 Package information 4.3 STH110N10F7-2, STH110N10F7-6 Packing information Figure 23: Tape outline Figure 24: Reel outline T REE L DIMENS IONS 40 mm min. Acc ess hole At slot location B D C N A Tape slot In core for Full radius At hub Tape start 16/19 G measured DocID024027 Rev 4 STH110N10F7-2, STH110N10F7-6 Package information Table 10: Tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 DocID024027 Rev 4 Min. Max. 330 13.2 26.4 30.4 17/19 Revision history 5 STH110N10F7-2, STH110N10F7-6 Revision history Table 11: Document revision history Date Revision Changes 10-Dec-2012 1 Initial release. Part number (STH110N10F7-2) previously included in datasheet ID024005   16-Jul-2013 18/19  Modified: title Modified: IDM value in Table 2: "Absolute maximum ratings", the entire typical values in Table 5: "Dynamic", Table 6: "Switching times" and Table 7: "Source-drain diode" Minor text changes Updated: H PAK-6 package information. Updated the title, features and description. Minor text changes. 2 11-Nov-2014 3    26-Nov-2014 4 Changed from Figure 2: "Safe operating area" to Figure 12: "Source-drain diode forward characteristics". 2 DocID024027 Rev 4 STH110N10F7-2, STH110N10F7-6 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2014 STMicroelectronics – All rights reserved DocID024027 Rev 4 19/19
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