STL225N6F7AG

STL225N6F7AG Automotive-grade N-channel 60 V, 1.2 mΩ typ., 120 A STripFET™ F7 Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features Order code STL225N6F7AG       V DS 60 V RDS(on) max ID 1.4 mΩ 120 A AEC-Q101 qualified Among the lowest RDS(on) on the market Excellent FoM (figure of merit) Low Crss/Ciss ratio for EMI immunity High avalanche ruggedness Wettable flank package Applications Figure 1: Internal schematic diagram  DC-DC converter for H.E.V. (hybrid electric vehicle) Description This N-channel Power MOSFET utilizes STripFET™ F7 technology with an enhanced trench gate structure that results in very low onstate resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. Table 1: Device summary Order code STL225N6F7AG March 2017 Marking Package 225N6F7 TM PowerFLAT DocID028557 Rev 3 This is information on a product in full production. Packaging 5x6 Tape and reel 1/15 www.st.com Contents STL225N6F7AG Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package mechanical data ............................................................... 9 5 2/15 4.1 PowerFLAT 5x6 package mechanical data ....................................... 9 4.2 Packing information ......................................................................... 12 Revision history ............................................................................ 14 DocID028557 Rev 3 STL225N6F7AG 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 60 V VGS Gate-source voltage ±20 V ID(1) Drain current (continuous) at TC = 25 °C 120 A ID(1) Drain current (continuous) at TC = 100 °C 120 A Drain current (pulsed) 480 A Total dissipation at TC = 25 °C 188 W -55 to 175 °C IDM(1)(2) PTOT Tj Operating junction temperature range Tstg Storage temperature range Notes: (1)This value is limited by package. (2)Pulse width limited by safe operating area Table 3: Thermal data Symbol Rthj-pcb (1) Rthj-case Parameter Value Unit Thermal resistance junction-pcb 31.3 °C/W Thermal resistance junction-case 0.8 °C/W Notes: (1)When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 s. DocID028557 Rev 3 3/15 Electrical characteristics 2 STL225N6F7AG Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4: On /off states Symbol Parameter Test conditions V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 V IDSS Zero gate voltage drain current VGS = 0 V VDS = 60 V IGSS Gate-body leakage current VGS = 20 V, VDS = 0 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 μA RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 60 A Min. Typ. Max. 60 Unit V 1 µA 100 nA 4 V 1.2 1.4 mΩ Min. Typ. Max. Unit - 6500 - pF - 3200 - pF - 230 - pF - 98 - nC - 38 - nC - 28 - nC Min. Typ. Max. Unit - 41 - ns - 45 - ns - 68 - ns - 35 - ns 2 Table 5: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 30 V, ID = 120 A, VGS = 0 to 10 V (see Figure 14: "Test circuit for gate charge behavior"). Table 6: Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 30 V, ID = 60 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform"). DocID028557 Rev 3 STL225N6F7AG Electrical characteristics Table 7: Source-drain diode Symbol VSD(1) Parameter Test conditions Min. Typ. Max. Unit 1.2 V Forward on voltage ISD = 60 A, VGS = 0 V - trr Reverse recovery time - 69 ns Qrr Reverse recovery charge - 103 nC IRRM Reverse recovery current ID = 60 A, di/dt = 100 A/µs VDD = 48 V (see Figure 15: "Test circuit for inductive load switching and diode recovery times"). - 3 A Notes: (1)Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID028557 Rev 3 5/15 Electrical characteristics 2.1 6/15 STL225N6F7AG Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Static drain-source on-resistance Figure 7: Gate charge vs gate-source voltage DocID028557 Rev 3 STL225N6F7AG Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Source-drain diode forward characteristics Figure 12: Normalized V(BR)DSS vs temperature DocID028557 Rev 3 7/15 Test circuits 3 8/15 STL225N6F7AG Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID028557 Rev 3 STL225N6F7AG 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 PowerFLAT 5x6 package mechanical data Figure 19: PowerFLAT™ 5x6 WF type C package outline 8231817_WF_typeC_r14 DocID028557 Rev 3 9/15 Package mechanical data STL225N6F7AG Table 8: PowerFLAT™ 5x6 WF type C mechanical data mm Dim. Min. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 C 5.80 6.00 6.10 0.50 5.20 5.40 D 5.00 D2 4.15 D3 4.05 4.20 4.35 D4 4.80 5.00 5.10 D5 0.25 0.40 0.55 D6 0.15 0.30 0.45 e 10/15 Typ. 4.45 1.27 E 6.20 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.20 0.325 0.45 E7 0.85 1.00 1.15 E9 4.00 4.20 4.40 E10 3.55 3.70 3.85 K 1.05 L 0.90 1.00 1.10 L1 0.175 0.275 0.375 θ 0° DocID028557 Rev 3 6.40 6.60 1.35 12° STL225N6F7AG Package mechanical data Figure 20: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_rev14 DocID028557 Rev 3 11/15 Package mechanical data 4.2 STL225N6F7AG Packing information Figure 21: PowerFLAT™ 5x6 WF tape (dimensions are in mm) Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape 12/15 DocID028557 Rev 3 STL225N6F7AG Package mechanical data Figure 23: PowerFLAT™ 5x6 reel (dimensions are in mm) DocID028557 Rev 3 13/15 Revision history 5 STL225N6F7AG Revision history Table 9: Document revision history Date Revision 23-Oct-2015 1 First release. 2 Updated title and features in cover page. Updated Table 2: "Absolute maximum ratings", Table 5: "Dynamic", Table 6: "Switching times" and Table 7: "Source-drain diode" Minor text changes. 3 Datasheet promoted from preliminary data to production data. Modified title and features on cover page. Modified Table 2: "Absolute maximum ratings". Modified Table 5: "Dynamic", Table 6: "Switching times" and Table 7: "Source-drain diode". Added Section 2.1: "Electrical characteristics (curves)". Minor text changes. 09-Jun-2016 17-Mar-2017 14/15 Changes DocID028557 Rev 3 STL225N6F7AG IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved DocID028557 Rev 3 15/15