STW38N65M5-4

STW38N65M5-4 N-channel 650 V, 0.073 Ω typ., 30 A MDmesh M5 Power MOSFET in a TO247-4 package Datasheet - preliminary data Features Order code VDS @ TJmax RDS(on) max ID STW38N65M5-4 710 V 0.095 Ω 30 A • • • • Extremely low RDS(on) Low gate charge and input capacitance Excellent switching performance 100% avalanche tested Applications • Figure 1: Internal schematic diagram Drain(1) High efficiency switching applications: − Servers − PV inverters − Telecom infrastructure − Multi kW battery chargers Description This device is an N-channel Power MOSFET based on the MDmesh™ M5 innovative vertical process technology combined with the wellknown PowerMESH™ horizontal layout. The resulting product offers extremely low onresistance, making it particularly suitable for applications requiring high power and superior efficiency. Gate(4) Driver source(3) Power source(2) ND1PS2DS3G4 Table 1: Device summary Order code Marking Package Packaging STW38N65M5-4 38N65M5 TO247-4 Tube April 2016 DocID029243 Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/13 www.st.com Contents STW38N65M5-4 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curve)........................................................ 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 4.1 5 2/13 TO247-4 package information ......................................................... 10 Revision history ............................................................................ 12 DocID029243 Rev 1 STW38N65M5-4 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol VGS Parameter Value Unit Gate- source voltage ±25 V ID Drain current (continuous) at TC = 25 °C 30 A ID Drain current (continuous) at TC = 100 °C 19 A Drain current (pulsed) 120 A IDM (1) PTOT Total dissipation at TC = 25 °C 190 W dv/dt (2) Peak diode recovery voltage slope 15 V/ns dv/dt (3) MOSFET dv/dt ruggedness 50 V/ns - 55 to 150 °C Tstg Tj Storage temperature range Operating junction temperature range Notes: (1) Pulse width limited by safe operating area (2) ISD ≤ 30 A, di/dt = 400 A/µs, VDS(peak) < V(BR)DSS, VDD = 400 V (3) VDS ≤ 520 V Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Value Unit 0.66 °C/W 50 °C/W Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR Avalanche current, repetitive or not repetitive (pulse width limited by Tjmax ) 8 °C/W EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 660 mJ DocID029243 Rev 1 3/13 Electrical characteristics 2 STW38N65M5-4 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 5: On /off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 Min. Typ. Max. Unit 650 V VDS = 650 V 1 µA VGS = 0, VDS = 650 V, (1) TC=125 °C 100 µA Gate-body leakage current VDS = 0, VGS = ± 25 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 4 5 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 15 A 0.073 0.095 Ω Min. Typ. Max. Unit - 3000 - pF - 74 - pF - 5.8 - pF - 244 - pf - 70 - pf IDSS Zero gate voltage drain current IGSS 3 Notes: (1) Defined by design, not subject to production test Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance (1) Co(tr) Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 Equivalent capacitance time related VGS = 0, VDS = 0 to 520 V Co(er) Equivalent capacitance energy related RG Intrinsic gate resistance f = 1 MHz, ID=0 A - 2.4 - Ω Qg Total gate charge - 71 - nC Qgs Gate-source charge - 18 - nC Qgd Gate-drain charge VDD = 520 V, ID = 15 A, VGS = 10 V (see Figure 16: "Gate charge test circuit") - 30 - nC (2) Notes: (1) Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. (2) Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. 4/13 DocID029243 Rev 1 STW38N65M5-4 Electrical characteristics Table 7: Switching times Symbol Parameter td(V) Voltage delay time tr(V) Voltage rise time tf(i) Current fall time tc(off) Test conditions VDD = 400 V, ID = 20 A, RG = 4.7 Ω, VGS = 10 V (see Figure 17: " Test circuit for inductive load switching and diode recovery times" and Figure 20: "Switching time waveform") Crossing time Min. Typ. Max. Unit - 60 - ns - 8 - ns - 8 - ns - 11.5 - ns Min. Typ. Max. Unit Table 8: Source drain diode Symbol ISD Parameter Test conditions Source-drain current - 30 A (1) Source-drain current (pulsed) - 120 A (2) Forward on voltage ISD = 30 A, VGS = 0 - 1.5 V trr Reverse recovery time - 382 ns Qrr Reverse recovery charge - 6.6 µC IRRM Reverse recovery current ISD = 30 A, di/dt = 100 A/µs VDD = 100 V (see Figure 20: "Switching time waveform") - 35 A - 522 ns - 10.3 µC - 40 A ISDM VSD trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 30 A, di/dt = 100 A/µs VDD = 100 V, Tj = 150 °C (see Figure 20: "Switching time waveform") Notes: (1) (2) Pulse width limited by safe operating area Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID029243 Rev 1 5/13 Electrical characteristics 2.2 STW38N65M5-4 Electrical characteristics (curve) Figure 2: Safe operating area Figure 3: Thermal impedance AM12636v1 ID (A) 100 s ai re on) s a R D S( i th x in a n m tio d by a er ite Op Lim 10 10µs 100µs 1ms Tj=150°C Tc=25°C 1 10ms Sinlge pulse 0.1 0.1 10 1 100 VDS(V) Figure 4: Output characteristics Figure 5: Tranfer characteristics AM12637v1 ID (A) 80 VGS = 10 V VGS = 8 V VGS = 7 V 60 40 VGS = 6 V 20 5 0 10 20 15 20 0 25 VDS(V) Figure 6: Gate charge vs gate-source voltage AM12639v1 VDS VGS (V) VDS 12 VDD=520V (V) ID=15A 500 400 300 8 200 4 100 0 6/13 VDS= 25V 60 40 0 AM12638v1 ID (A) 80 0 20 40 60 80 0 Qg(nC) DocID029243 Rev 1 3 4 5 6 7 8 VGS(V) Figure 7: Static drain-source on-resistance STW38N65M5-4 Electrical characteristics Figure 8: Capacitance variations Figure 9: Output capacitance stored energy AM12641v1 C (pF) AM12642v1 Eoss (µJ) 14 10000 12 Ciss 1000 10 8 100 6 Coss 4 10 2 Crss 1 0.1 1 100 10 VDS(V) Figure 10: Normalized gate threshold voltage vs temperature AM05459v1 VGS(th) (norm) 1.10 ID = 250 µA 0 0 100 400 300 500 600 VDS(V) Figure 11: Normalized on-resistance vs temperature RDS(on) (norm) 2.1 1.9 1.00 200 AM05460v1 VGS = 10 V ID = 15 A 1.7 1.5 1.3 0.90 1.1 0.80 0.9 0.7 0.70 -50 -25 0 25 50 TJ(°C) 75 100 Figure 12: Source-drain diode forward characteristics AM05461v1 VSD (V) 0.5 -50 -25 0 50 75 100 TJ(°C) Figure 13: Normalized V(BR)DSS vs temperature AM10399v1 V(BR)DSS (norm) TJ=-50°C 1.08 1.2 ID = 1mA 1.06 1.0 1.04 0.8 TJ=25°C 0.6 TJ=150°C 1.02 1.00 0.98 0.4 0.96 0.2 0 25 0.94 0 10 20 30 40 50 ISD(A) DocID029243 Rev 1 0.92 -50 -25 0 25 50 75 100 TJ(°C) 7/13 Electrical characteristics STW38N65M5-4 Figure 14: Switching energy vs gate resistance AM18024v1 E (µJ) 350 ID=20A VDD=400V Eon 300 250 200 150 Eoff 100 50 0 0 10 20 Eon including reverse recovery of a SiC diode. 8/13 DocID029243 Rev 1 30 40 RG(Ω) STW38N65M5-4 3 Test circuits Test circuits Figure 15: Switching times test circuit for resistive load Figure 16: Gate charge test circuit VDD 47kΩ 12V 1kΩ 100nF 3.3 µF 2200 RL + µF VDD VGS 2200 µF + RG IG=CONST Vi ≤ VGS VD D.U.T. D.U.T. 2.7kΩ VG 47kΩ PW GND1 (driver signal) GND2 (power) 1kΩ PW GND1 AM15855v1 Figure 17: Test circuit for inductive load switching and diode recovery times A A G D.U.T. FAST DIODE B B GND2 AM15856v1 Figure 18: Unclamped inductive load test circuit A D L S 25Ω 100Ω L=100µH 3.3 µF B D VD + 1000 µF 3.3 µF VDD + ID G RG 2200 µF VDD S D.U.T. Vi GND1 GND2 D.U.T. Pw GND1 AM15857v1 Figure 19: Unclamped inductive waveform GND2 AM15858v1 Figure 20: Switching time waveform Con cept waveform for Indu ctive Load Turn-off Id 90%Vds 90%Id Tdelay -off Vgs 90%Vgs on Vgs(I(t )) 10%Id 10%Vds Vds Trise Tfall Tcross --over DocID029243 Rev 1 AM05540v2_for_M5 9/13 Package information 4 STW38N65M5-4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. 4.1 TO247-4 package information Figure 21: TO247-4 package outline 10/13 DocID029243 Rev 1 STW38N65M5-4 Package information Table 9: TO247-4 mechanical data mm. Dim. Min. Typ. Max. A 4.90 5.00 5.10 A1 2.31 2.41 2.51 A2 1.90 2.00 2.10 b 1.16 b1 1.15 1.29 1.20 1.25 b2 0 0.20 c 0.59 0.66 c1 0.58 0.60 0.62 D 20.90 21.00 21.10 D1 16.25 16.55 16.85 D2 1.05 1.20 1.35 D3 24.97 25.12 25.27 E 15.70 15.80 15.90 E1 13.10 13.30 13.50 E2 4.90 5.00 5.10 E3 2.40 2.50 2.60 e 2.44 2.54 2.64 e1 4.98 5.08 5.18 L 19.80 19.92 20.10 P 3.50 3.60 3.70 P1 7.40 P2 2.40 Q 5.60 S 2.50 2.60 6.00 6.15 T 9.80 10.20 U 6.00 6.40 DocID029243 Rev 1 11/13 Revision history 5 STW38N65M5-4 Revision history Table 10: Document revision history 12/13 Date Revision 20-Apr-2016 1 DocID029243 Rev 1 Changes Initial release. STW38N65M5-4 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID029243 Rev 1 13/13