FDMA1024NZ

Dual N-Channel PowerTrench® MOSFET 20 V, 5.0 A, 54 mΩ Features General Description This device is designed specifically as a single package solution for dual switching requirements in cellular handset and other ultra-portable applications. It features two independent N-Channel MOSFETs with low on-state resistance for minimum conduction losses. „ Max rDS(on) = 54 mΩ at VGS = 4.5 V, ID = 5.0 A „ Max rDS(on) = 66 mΩ at VGS = 2.5 V, ID = 4.2 A „ Max rDS(on) = 82 mΩ at VGS = 1.8 V, ID = 2.3 A The MicroFET 2X2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. „ Max rDS(on) = 114 mΩ at VGS = 1.5 V, ID = 2.0 A „ HBM ESD protection level = 1.6 kV (Note 3) „ Low profile - 0.8 mm maximum - in the MicroFET 2x2 mm new package Applications „ RoHS Compliant „ Baseband Switch „ Free from halogenated compounds and ant imony oxides „ Loadswitch PIN 1 „ DC-DC Conversion G1 S1 D2 D1 D1 D2 G2 S2 S1 1 6 D1 G1 2 5 G2 D2 3 4 S2 MicroFET 2x2 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS VGS ID Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Note 1a) TJ, TSTG Units V ±8 V 5.0 A 6.0 -Pulsed PD Ratings 20 Power Dissipation (Note 1a) 1.4 Power Dissipation (Note 1b) 0.7 Operating and Storage Junction Temperature Range W –55 to +150 °C Thermal Characteristics RθJA Thermal Resistance, Junction to Ambient (Note 1a) 86 (Single Operation) RθJA Thermal Resistance, Junction to Ambient (Note 1b) 173 (Single Operation) RθJA Thermal Resistance, Junction to Ambient (Note 1c) 69 (Dual Operation) RθJA Thermal Resistance, Junction to Ambient (Note 1d) 151 (Dual Operation) °C/W Package Marking and Ordering Information Device Marking 024 Device FDMA1024NZ ©2010 Semiconductor Components Industries, LLC. October-2017, Rev.2 Package MicroFET 2X2 1 Reel Size 7” Tape Width 8 mm Quantity 3000 units Publication Order Number: FDMA1024NZ/D FDMA1024NZ Dual N-Channel Power Trench® MOSFET FDMA1024NZ Parameter Symbol Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient IGSS Gate to Source Leakage Current IDSS Zero Gate Voltage Drain Current ID = 250 µA, VGS = 0 V 20 ID = 250 µA, referenced to 25 °C V 19 VDS = 16 V, VGS = 0 V VGS = ±8 V, VDS = 0 V mV/°C 1 µA ±10 µA 1.0 V On Characteristics VGS(th) ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250 µA 0.4 ID = 250 µA, referenced to 25 °C VGS = 4.5 V, ID = 5.0 A rDS(on) Static Drain to Source On-Resistance gFS Forward Transconductance 0.7 -3 mV/°C 37 54 VGS = 2.5 V, ID = 4.2 A 43 66 VGS = 1.5 V, ID = 2.0 A VGS = 1.8 V, ID = 2.3 A 52 82 67 114 VGS = 4.5 V, ID = 5.0 A, TJ = 125 °C 51 75 VDD = 5 V, ID = 5.0 A 16 mΩ S Dynamic Characteristics Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance RG Gate Resistance VDS = 10 V, VGS = 0 V, f = 1 MHz f = 1 MHz 375 500 pF 70 95 pF 40 65 pF 4.3 Ω Switching Characteristics td(on) Turn-On Delay Time tr Rise Time tf Qgs Gate to Source Gate Charge VDD = 10 V, ID = 5.0 A VGS = 4.5 V, RGEN = 6 Ω 5.3 11 2.2 10 ns 18 33 ns ns td(off) Turn-Off Delay Time Fall Time 2.3 10 ns Qg Total Gate Charge 5.2 7.3 nC Qgd Gate to Drain “Miller” Charge VGS = 4.5 V, VDD = 10 V, ID = 5.0 A 0.6 nC 0.9 nC Drain-Source Diode Characteristics IS Maximum Continuous Source-Drain Diode Forward Current trr Reverse Recovery Time VSD Source to Drain Diode Forward Voltage Qrr Reverse Recovery Charge VGS = 0 V, IS = 1.1 A IF = 5.0 A, di/dt = 100 A/µs www.onsemi.com 2 (Note 2) 1.1 A 0.7 1.2 V 19 35 ns 5 10 nC FDMA1024NZ Dual N-Channel Power Trench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 1. RθJA is determined with the device mounted on a 1 in 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. (a) RθJA = 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation. (b) RθJA = 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation. (c) RθJA = 69 oC/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation. (d) RθJA = 151 oC/W when mounted on a minimum pad of 2 oz copper. For dual operation. a) 86 oC/W when mounted on a 1 in2 pad of 2 oz copper. b) 173 oC/W when mounted on a minimum pad of 2 oz copper. c) 69 oC/W when mounted on a 1 in2 pad of 2 oz copper. 2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0 % 3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. www.onsemi.com 3 d) 151 oC/W when mounted on a minimum pad of 2 oz copper. FDMA1024NZ Dual N-Channel Power Trench® MOSFET Notes: 6 VGS = 1.5 V 5 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3.0 VGS = 4.5 V 4 VGS = 3.5 V VGS = 2.5 V VGS = 1.8 V 3 2 1 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 0 0.0 0.2 0.4 0.6 0.8 0.5 2 3 200 4 5 SOURCE ON-RESISTANCE (mΩ) rDS(on), DRAIN TO 0.8 120 80 TJ = 125 oC 40 TJ = 25 oC 0 1.0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) ID = 2.5 A 1.5 2.0 2.5 3.0 3.5 Figure 4. On-Resistance vs Gate to Source Voltage 6 10 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX VDS = 5 V 4 3 TJ = 2 125 oC TJ = 25 oC 1 TJ = -55 oC 0 0.0 0.5 1.0 1.5 VGS, GATE TO SOURCE VOLTAGE (V) 4.0 4.5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature 5 6 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 160 IS, REVERSE DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.0 ID, DRAIN CURRENT (A) VGS = 4.5 V ID, DRAIN CURRENT (A) 1.2 -50 VGS = 1.8 V VGS = 2.5 V 1.0 1.0 ID = 5 A VGS = 4.5 V 0.6 -75 VGS = 3.5 V 1.5 Figure 1. On-Region Characteristics 1.4 VGS = 1.5 V 2.0 VDS, DRAIN TO SOURCE VOLTAGE (V) 1.6 PULSE DURATION = 80 µs DUTY CYCLE = 0.5% MAX 2.5 1 TJ = 125 oC TJ = 25 oC 0.1 0.01 1E-3 0.0 2.0 VGS = 0 V TJ = -55 oC 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Source to Drain Diode Forward Voltage vs Source Current Figure 5. Transfer Characteristics www.onsemi.com 4 1.2 FDMA1024NZ Dual N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE (V) 5 1000 ID = 5 A Ciss 3 VDD = 10 V VDD = 8 V 2 CAPACITANCE (pF) 4 VDD = 12 V 1 0 0 2 1 3 4 5 100 Coss 10 0.1 6 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics 100 us -3 ID, DRAIN CURRENT (A) VGS = 0 V 10 -4 10 TJ = 125 oC -5 10 -6 10 TJ = 25 oC 0 3 6 9 12 0.1 100 ms 1s SINGLE PULSE TJ = MAX RATED 10 s RθJA = 173 oC/W 0.01 0.1 15 10 ms THIS AREA IS LIMITED BY r DS(on) -7 -8 1 ms 1 10 DC TA = 25 oC 1 10 60 VDS, DRAIN to SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 9. Gate Leakage Current vs Gate to Source Voltage Figure 10. Forward Bias Safe Operating Area 100 P(PK), PEAK TRANSIENT POWER (W) 20 10 -2 Ig, GATE LEAKAGE CURRENT (A) 10 Figure 8.Capacitance vs Drain to Source Voltage 10 10 Crss f = 1 MHz VGS = 0 V VGS = 4.5 V 10 SINGLE PULSE o RθJA = 173 C/W o TA = 25 C 1 0.3 -3 10 -2 10 -1 10 0 10 1 10 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation www.onsemi.com 5 100 1000 FDMA1024NZ Dual N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE o RθJA = 173 C/W 0.01 -3 10 -2 10 -1 10 1 10 100 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction to Ambient Transient Thermal Response Curve www.onsemi.com 6 1000 FDMA1024NZ Dual N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted FDMA1024NZ Dual N-Channel Power Trench® MOSFET Dimensional Outline and Pad Layout Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor products. www.onsemi.com 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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