FDMA3027PZ

DATA SHEET www.onsemi.com MOSFET – Dual P-Channel POWERTRENCH) -30 V, -3.3 A, 87 mW WDFN6 2X2, 0.65P CASE 511DA FDMA3027PZ, FDMA3027PZ-F130 Description This device is designed specifically as a single package solution for dual switching requirements such as gate driver for larger Mosfets. It features two independent P−Channel MOSFETs with low on−state resistance for minimum conduction losses. The MicroFET 2x2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. G−S zener has been added to enhance ESD voltage level. S1 1 6 D1 G1 2 5 G2 D2 3 4 S2 Features • • • • • MARKING DIAGRAM Max RDS(on) = 87 mW at VGS = −10 V, ID = −3.3 A Max RDS(on) = 152 mW at VGS = −4.5 V, ID = −2.3 A HBM ESD Protection Level > 2 kV Typical (Note 3) Low Profile − 0.8 mm Maximum − in the New Package MicroFET 2x2 mm These Devices are Pb−Free and are RoHS Compliant ZXYKK 327 Z XY KK 327 Typical Applications • Load Switch • Discrete Gate Driver PIN 1 = Assembly Plan Code = Date Code (Year & week) = Lot Run Traceability Code = Specific Device Code PIN ASSIGNMENT MOSFET Maximum Ratings TA = 25°C unless otherwise noted Ratings Units VDS Drain to Source Voltage Parameter −30 V VGS Gate to Source Voltage ±25 V Drain Current −Continuous (Note 1a) −3.3 A −Pulsed −15 Power Dissipation (Note 1a) 1.4 Power Dissipation (Note 1b) 0.7 Symbol ID PD TJ, TSTG Operating and Storage Junction Temperature Range March, 2022 − Rev 4 G1 D1 D2 D2 W −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. © Semiconductor Components Industries, LLC, 2016 S1 1 D1 G2 S2 ORDERING INFORMATION See detailed ordering and shipping information on page 7 of this data sheet. Publication Order Number: FDMA3027PZ/D FDMA3027PZ, FDMA3027PZ−F130 THERMAL CHARACTERISTICS RθJA Thermal Resistance for Single Operation, Junction to Ambient (Note 1a) 86 °C/W Thermal Resistance for Single Operation, Junction to Ambient (Note 1b) 173 °C/W Thermal Resistance for Dual Operation, Junction to Ambient (Note 1c) 69 °C/W Thermal Resistance for Dual Operation, Junction to Ambient (Note 1d) 151 °C/W Thermal Resistance for Single Operation, Junction to Ambient (Note 1e) 160 °C/W Thermal Resistance for Dual Operation, Junction to Ambient (Note 1f) 133 °C/W ELECTRICAL CHARACTERISTICS TA = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units −30 − − V Off Characteristics Drain to Source Breakdown Voltage ID = −250 mA, VGS = 0 V Breakdown Voltage Temperature Coefficient ID = −250 mA, referenced to 25°C − −22 − mV/°C IDSS Zero Gate Voltage Drain Current VDS = −24 V, VGS = 0 V − − −1 mA IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V − − ±10 mA VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = −250 mA −1 −1.9 −3 V DV GS(th) Gate to Source Threshold Voltage Temperature Coefficient ID = −250 mA, referenced to 25°C − 5 − mV/°C Static Drain to Source On Resistance VGS = −10 V, ID = −3.3 A − 69 87 mW VGS = −4.5 V, ID = −2.3 A − 108 152 VGS = −10 V, ID = −3.3 A, TJ = 125°C − 97 122 VDS = −5 V, ID = −3.3 A − 6 − S VDS = −15 V, VGS = 0 V, f =1 MHz − 324 435 pF BVDSS DBV DSS(th) DT J On Characteristics DT J RDS(on) gFS Forward Transconductance Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance − 59 80 pF Crss Reverse Transfer Capacitance − 53 80 pF Gate Resistance − 12 − W − 5.2 11 ns − 3 10 ns Turn−Off Delay Time − 17 31 ns Fall Time − 11 25 ns VGS = 0 V to −10 V, VDD = −15 V, ID = −3.3 A − 7.2 10 nC VGS = 0 V to −5 V, VDD = −15 V, ID = −3.3 A − 4.1 6 nC VDD = −15 V, ID = −3.3 A − 1.0 − nC − 1.9 − nC Rg Switching Characteristics td(on) tr td(off) tf Qg(TOT) Turn−On Delay Time Rise Time Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge VDD = −15 V, ID = −3.3 A, VGS = −10 V, RGEN = 6 Ω www.onsemi.com 2 FDMA3027PZ, FDMA3027PZ−F130 ELECTRICAL CHARACTERISTICS (continued) TA = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units − −0.94 −1.3 V − 20 32 ns − 10 18 nC Drain−Source Diode Characteristics VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = −3.3 A (Note 2) trr Reverse Recovery Time Qrr Reverse Recovery Charge IF = −3.3 A, di/dt = 100 A/ms Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. RqJA is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR−4 material. RqJC is guaranteed by design while RqJA is determined by the user’s board design. (a) RqJA = 86°C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. For single operation. (b) RqJA = 173°C/W when mounted on a minimum pad of 2 oz copper. For single operation. (c) RqJA = 69°C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5” x 1.5” x 0.062” thick PCB. For dual operation. (d) RqJA = 151°C/W when mounted on a minimum pad of 2 oz copper. For dual operation. (e) RqJA = 160°C/W when mounted on a 30 mm2 pad of 2 oz copper. For single operation. (f) RqJA = 133°C/W when mounted on a 30 mm2 pad of 2 oz copper. For dual operation. a. 86 °C/W when mounted on a 1 in2 pad of 2 oz copper b. 173 °C/W when mounted on a minimum pad of 2 oz copper c. 69 °C/W when mounted on a 1 in2 pad of 2 oz copper d. 151 °C/W when mounted on a minimum pad of 2 oz copper f. 133 °C/W when mounted on 30 mm2 pad of 2 oz copper e. 160 °C/W when mounted on 30 mm2 pad of 2 oz copper 2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0% 3. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied. www.onsemi.com 3 FDMA3027PZ, FDMA3027PZ−F130 VGS = −5 V VGS = −10 V −ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON−RESISTANCE 15 12 VGS = −4.5 V 9 VGS = −4 V 6 VGS = −3.5 V 3 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 0 0 1 3 2 4 5 5 =−3.5 VGS = −3.5VV 4 VGS = −4 V 3 VGS = −4.5 V 2 VGS = −5 V 1 0 0 3 6 −VDS, DRAIN TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE ON−RESISTANCE ID = −3.3 A PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX RDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 −75 −50 25 0 25 75 50 100 300 200 −IS, REVERSE DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) 9 6 TJ = 150°C 2 TJ =−55°C 3 4 5 6 8 10 −VGS, GATE TO SOURCE VOLTAGE (V) VDS = −5 V 0 4 Figure 4. On−Resistance vs Gate to Source Voltage PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX TJ = 25°C TJ = 125°C 0 2 125 150 Figure 3. Normalized On−Resistance vs Junction Temperature 3 TJ = 125°C 100 TJ, JUNCTION TEMPERATURE (5C) 0 15 400 ID = −3 3 A VGS = −10 V 1.4 12 12 Figure 2. Normalized On−Resistance vs Drain Current and Gate Voltage 1.6 15 9 −ID, DRAIN CURRENT (A) Figure 1. On−Region Characteristics 1.5 VGS = −10 V PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 20 10 1 TJ = 150°C TJ = 25°C 0.1 TJ = −55°C 0.01 0.001 0.0 6 VGS = 0 V 0.2 0.4 0.6 0.8 1.0 1.2 1.4 −VGS, GATE TO SOURCE VOLTAGE (V) −VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current www.onsemi.com 4 1.6 FDMA3027PZ, FDMA3027PZ−F130 10 1000 ID = −3.3 A VDD = −15 V 8 Ciss VDD = −10 V CAPACITANCE (pF) −VGS, GATE TO SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS (continued) VDD = −20 V 6 4 Crss 2 0 f = 1 MHz VGS = 0 V 0 2 4 Qg, GATE CHARGE (nC) 6 10 8 −ID, DRAIN CURRENT (A)) VDS = 0 V 10−4 10−5 TJ = 125°C 10−6 10−7 TJ = 25°C 10−8 0 4 8 12 16 20 24 28 1 30 10 ms THIS AREA IS LIMITEDBY rDS(on) 0.1 0.01 32 1 ms 100 ms SINGLE PULSE 1s 10 s DC TJ = MAX RATED) RqJA = 173°C/W TA = 25°C 0.1 1 10 100 −VDS, DRAIN to SOURCE VOLTAGE (V) −VGS, GATE TO SOURCE VOLTAGE (V) Figure 10. Forward Bias Safe Operating Area Figure 9. Gate Leakage Current vs Gate to Source Voltage P(PK), PEAK TRANSIENT POWER (W) 10 20 10 10−3 10−9 1 Figure 8. Capacitance vs Drain to Source Voltage 10−1 10−2 0.1 −VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics −Ig, GATE LEAKAGE CURRENT (A) Coss 100 30 10 1 0.5 10−3 SINGLE PULSE RqJA = 173°C/W TA = 25°C 10−2 10−1 1 10 t, PULSE WIDTH (sec) Figure 11. Single Pulse Maximum Power Dissipation www.onsemi.com 5 100 1000 FDMA3027PZ, FDMA3027PZ−F130 TYPICAL CHARACTERISTICS (continued) 2 NORMALIZED THERMAL IMPEDANCE, ZqJA) DUTY CYCLE−DESCENDING ORDER 1 D = 0.5 P DM 0.2 0.1 0.1 t1 t2 0.05 0.02 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZqJA x + RqJA + TA SINGLE PULSE RqJA = 173°C/ 0.02 10−3 10−2 W 1 10 10−1 t, RECTANGULAR PULSE DURATION (sec) 100 Figure 12. Junction−to−Ambient Transient Thermal Response Curve www.onsemi.com 6 1000 FDMA3027PZ, FDMA3027PZ−F130 ORDERING INFORMATION Device Order Number Package Type Pin 1 Orientation in Tape Cavity Shipping† FDMA3027PZ WDFN−6 (Pb−Free/Halide Free) Top Left 3000 / Tape and Reel FDMA3027PZ−F130 WDFN−6 (Pb−Free/Halide Free) Top Right 3000 / Tape and Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 7 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN6 2x2, 0.65P CASE 511DA ISSUE O 0.05 C 2.0 DATE 31 JUL 2016 A B 2X 1.80 1.72 2.0 0.80(2X) 0.21 1.00(2X) 1.41 0.05 C TOP VIEW 2.25 2X 0.42(6X) PIN#1 IDENT 0.42(6X) (0.10) 0.65 RECOMMENDED LAND PATTERN 0.75±0.05 0.10 C 0.20±0.05 0.08 C 0.025±0.025 SEATING PLANE C SIDE VIEW NOTES: A. CONFORM TO JADEC REGISTRATIONS MO−229, VARIATION VCCC, EXCEPT WHERE NOTED. 2.00±0.05 1.64±0.05 B. DIMENSIONS ARE IN MILLIMETERS. 0.645±0.05 0.350 (0.185)4X PIN#1 IDENT 0.275±0.05 1 3 C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009. D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. (6X) F. NON−JEDEC DUAL DAP 0.86±0.05 2.00±0.05 (0.57) F 6 4 0.33±0.05 (6X) 0.65 1.30 0.10 C A B 0.05 C BOTTOM VIEW DOCUMENT NUMBER: DESCRIPTION: 98AON13615G WDFN6 2X2, 0.65P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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