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FDMC7660DC
N-Channel Dual CoolTM 33 PowerTrench® MOSFET
30 V, 40 A, 2.2 mΩ
Features
General Description
Dual CoolTM Top Side Cooling PQFN package
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s
advanced
PowerTrench®
process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Max rDS(on) = 2.2 mΩ at VGS = 10 V, ID = 22 A
Max rDS(on) = 3.3 mΩ at VGS = 4.5 V, ID = 18 A
High performance technology for extremely low rDS(on)
SyncFET Schottky Body Diode
Applications
RoHS Compliant
Synchronous Rectifier for DC/DC Converters
Telecom Secondary Side Rectification
High End Server/Workstation
Pin 1
S
S
S
G
D
Top
Dual
CoolTM
33
D
D
D
D
5
4
G
D
6
3
S
D
7
2
S
D
8
1
S
Bottom
MOSFET Maximum Ratings TA= 25°C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
(Note 4)
Drain Current -Continuous (Package limited)
ID
TC = 25 °C
-Continuous (Silicon limited)
TC = 25 °C
-Continuous
TA = 25 °C
Ratings
30
Units
V
±20
V
40
150
(Note 1a)
30
-Pulsed
A
200
EAS
Single Pulse Avalanche Energy
(Note 3)
220
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 5)
1.0
V/ns
(Note 1a)
3.0
PD
TJ, TSTG
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
78
Operating and Storage Junction Temperature Range
-55 to + 150
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
(Top Source)
4.3
RθJC
Thermal Resistance, Junction to Case
(Bottom Drain)
1.6
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
42
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
105
RθJA
Thermal Resistance, Junction to Ambient
(Note 1i)
17
RθJA
Thermal Resistance, Junction to Ambient
(Note 1j)
26
RθJA
Thermal Resistance, Junction to Ambient
(Note 1k)
12
°C/W
Package Marking and Ordering Information
Device Marking
7660
Device
FDMC7660DC
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
Package
Dual CoolTM 33
1
Reel Size
13’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
July 2015
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current, Forward
VGS = 20 V, VDS = 0 V
100
nA
2.5
V
30
V
15
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1.2
2
-7
mV/°C
VGS = 10 V, ID = 22 A
1.6
2.2
VGS = 4.5 V, ID = 18 A
2.5
3.3
VGS = 10 V, ID = 22 A, TJ = 125°C
2.2
3.3
VDS = 5 V, ID = 22 A
147
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 15 V, VGS = 0 V,
f = 1MHz
3885
5170
pF
1215
1620
pF
100
150
pF
0.7
1.5
Ω
ns
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
17
31
VDD = 15 V, ID = 22 A,
VGS = 10 V, RGEN = 6 Ω
6.6
13
ns
36
58
ns
tf
Fall Time
5
10
ns
Qg
Total Gate Charge
VGS = 0 V to 10 V
54
76
nC
VGS = 0 V to 4.5 V VDD = 15 V,
ID = 22 A
24
34
13
nC
5.5
nC
Qg
Total Gate Charge
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
nC
Drain-Source Diode Characteristics
VSD
Source-Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
VGS = 0 V, IS = 22 A
(Note 2)
0.8
1.2
VGS = 0 V, IS = 1.9 A
(Note 2)
0.7
1.2
IF = 22 A, di/dt = 100 A/μs
2
V
43
69
ns
24
38
nC
www.fairchildsemi.com
FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
RθJC
Thermal Resistance, Junction to Case
(Top Source)
4.3
RθJC
Thermal Resistance, Junction to Case
(Bottom Drain)
1.6
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
42
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
105
RθJA
Thermal Resistance, Junction to Ambient
(Note 1c)
29
RθJA
Thermal Resistance, Junction to Ambient
(Note 1d)
40
RθJA
Thermal Resistance, Junction to Ambient
(Note 1e)
19
RθJA
Thermal Resistance, Junction to Ambient
(Note 1f)
23
RθJA
Thermal Resistance, Junction to Ambient
(Note 1g)
30
RθJA
Thermal Resistance, Junction to Ambient
(Note 1h)
79
RθJA
Thermal Resistance, Junction to Ambient
(Note 1i)
17
RθJA
Thermal Resistance, Junction to Ambient
(Note 1j)
26
RθJA
Thermal Resistance, Junction to Ambient
(Note 1k)
12
RθJA
Thermal Resistance, Junction to Ambient
(Note 1l)
16
°C/W
NOTES:
1. RθJA is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
b. 105 °C/W when mounted on
a minimum pad of 2 oz copper
a. 42 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper
d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper
f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
g. 200FPM Airflow, No Heat Sink,1 in2 pad of 2 oz copper
h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper
j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper
l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 220 mJ is based on starting TJ = 25 oC; N-ch: L = 1 mH, IAS = 21 A, VDD = 27 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 33.5 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
5. ISD ≤ 22 A, di/dt ≤ 100 A/μs, VDD ≤ BVDSS, Starting TJ = 25 oC.
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
3
www.fairchildsemi.com
FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Thermal Characteristics
200
4
VGS = 6 V
VGS = 8 V
ID, DRAIN CURRENT (A)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
150
VGS = 4.5 V
100
VGS = 4 V
50
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.2
0.4
0.6
0.8
VGS = 4 V
3
VGS = 4.5 V
2
VGS = 6 V
1
0
1.0
0
Figure 1. On Region Characteristics
50
100
ID, DRAIN CURRENT (A)
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
-75
-50
-25
0
25
50
75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
200
15
ID = 22 A
VGS = 10 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 22 A
10
5
TJ = 125oC
TJ = 25 oC
0
100 125 150
2
4
TJ, JUNCTION TEMPERATURE (oC)
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VDS = 3 V
TJ = 150 oC
100
TJ = 25 oC
50
TJ = -55 oC
3.0
3.5
4.0
500
10
VGS = 0 V
100
TJ = 150 oC
10
TJ = 25 oC
1
TJ = -55 oC
0.1
0.2
4.5
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
8
Figure 4. On-Resistance vs Gate to
Source Voltage
200
2.5
6
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
150
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
0
2.0
VGS = 10 V
VGS = 8 V
VDS, DRAIN TO SOURCE VOLTAGE (V)
150
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
4
www.fairchildsemi.com
FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
6000
ID = 22 A
Ciss
8
VDD = 10 V
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = 15 V
VDD = 20 V
4
2
1000
100
10
20
30
40
50
f = 1 MHz
VGS = 0 V
Crss
50
0.1
0
0
Coss
60
1
10
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
160
30
o
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
VGS = 10 V
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
RθJC = 1.6 C/W
120
VGS = 4.5 V
80
40
Limited by Package
1
0.01
0.1
1
10
0
25
100 300
50
100
125
150
o
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
4
500
P(PK), PEAK TRANSIENT POWER (W)
10
100
100 us
10
1 ms
10 ms
1
75
TC, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
THIS AREA IS
LIMITED BY rDS(on)
0.1
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
RθJA = 105 oC/W
10s
DC
TA = 25 oC
0.01
0.01
0.1
1
10
100
TA = 25 oC
2
10
10
1
0.2 -4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
SINGLE PULSE
RθJA = 105 oC/W
3
10
Figure 12. Single Pulse Maximum
Power Dissipation
5
www.fairchildsemi.com
FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
NORMALIZED THERMAL
IMPEDANCE, ZθJA
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.01
t1
t2
0.001
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 105 C/W
0.0001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2011 Fairchild Semiconductor Corporation
FDMC7660DC Rev.1.3
6
www.fairchildsemi.com
FDMC7660DC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
3.30
3.40
2.37 MIN
A
PKG
CL
B
8
5
8
SYM
CL
KEEP
OUT
AREA
5
(0.45)
2.15 MIN
PKG
CL
3.30
PKG
CL
(0.40)
0.70 MIN
(0.65)
1
4
1
SEE DETAIL 'A'
4
0.65
0.42 MIN
1.95
LAND PATTERN
RECOMMENDATION
0.10 C A B
1.95
0.65
0.32±0.05
1
4
0.40±0.10
(0.20)
PKG
CL
3.30±0.10
2.00±0.10
(0.39)
8
0.52
5
(2.27)
3.30±0.10
0.10 C
1.00±0.05
0.08 C
0.05
0.00
0.20±0.025
SCALE: 2X
C
SEATING
PLANE
NOTES: UNLESS OTHERWISE SPECIFIED
A) PACKAGE STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. BA,
DATED OCTOBER 2002.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: PQFN08CREV3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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