NVTFS4824NTAG

NVTFS4824N MOSFET – Power, Single N-Channel 30 V, 4.7 mW, 46 A Features • • • • • • Small Footprint (3.3 x 3.3 mm) for Compact Design Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses NVTFS4824NWF − Wettable Flanks Product AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com V(BR)DSS Symbol 7.5 mW @ 4.5 V Value Unit VDSS 30 V Gate−to−Source Voltage VGS "20 V ID 46 A Power Dissipation RYJ−mb (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1, 3, & 4) Power Dissipation RqJA (Notes 1, 3) Pulsed Drain Current Tmb = 25°C Steady State Tmb = 100°C Tmb = 25°C N−Channel Steady State PD Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL(pk) = 38 A, L = 0.1 mH, RG = 25 W) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) W 21 ID A 18.2 12.8 PD W 3.2 TA = 100°C TA = 25°C, tp = 10 ms S (1, 2, 3) MARKING DIAGRAM 11 TA = 100°C TA = 25°C G (4) 33 Tmb = 100°C TA = 25°C 46 A D (5 − 8) Drain−to−Source Voltage Continuous Drain Current RYJ−mb (Notes 1, 2, 3, 4) ID MAX 4.7 mW @ 10 V 30 V MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter RDS(on) MAX 1 WDFN8 (m8FL) CASE 511AB 1 S S S G XXXX AYWWG G D D D D 1.6 IDM 402 A TJ, Tstg −55 to 175 °C IS 21 A EAS 72 mJ TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. XXXX A Y WW G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet. THERMAL RESISTANCE MAXIMUM RATINGS (Note 1) Parameter Junction−to−Mounting Board (top) − Steady State (Notes 2 and 3) Junction−to−Ambient − Steady State (Note 3) Symbol Value Unit RYJ−mb 7.2 °C/W RqJA 47 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle. © Semiconductor Components Industries, LLC, 2016 August, 2019 − Rev. 3 1 Publication Order Number: NVTFS4824N/D NVTFS4824N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min V(BR)DSS VGS = 0 V, ID = 250 mA 30 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Zero Gate Voltage Drain Current IDSS Gate−to−Source Leakage Current VGS = 0 V, VDS = 30 V V TJ = 25°C 1.0 TJ = 125°C 10 mA IGSS VDS = 0 V, VGS = "20 V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA 2.5 V Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 23 A 3.5 4.7 mW VGS = 4.5 V, ID = 23 A 5.7 7.5 VDS = 1.5 V, ID = 20 A 56 S 1740 pF "100 nA ON CHARACTERISTICS (Note 5) Forward Transconductance gFS 1.5 CHARGES AND CAPACITANCES Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 200 Total Gate Charge QG(TOT) 14 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD Total Gate Charge QG(TOT) VGS = 0 V, f = 1.0 MHz, VDS = 12 V VGS = 4.5 V, VDS = 15 V, ID = 23 A 360 nC 1.6 5.3 5.5 VGS = 10 V, VDS = 15 V, ID = 23 A 29 nC 12 ns SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(on) tr td(off) VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 27 20 6 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD TJ = 25°C 0.81 TJ = 125°C 0.69 tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 23 A 19 VGS = 0 V, dIS/dt = 100 A/ms, IS = 23 A QRR www.onsemi.com 2 V ns 9.1 9.6 8.8 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. 6. Switching characteristics are independent of operating junction temperatures. 1.1 nC NVTFS4824N TYPICAL CHARACTERISTICS 125 125 ID, DRAIN CURRENT (A) 75 4.0 V 3.6 V 50 VGS = 3.2 V 25 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 5V 100 VDS ≥ 10 V 4.5 V TJ = 25°C 0 1 2 3 4 75 50 TJ = 100°C 25 TJ = 25°C TJ = −55°C 2 3 4 5 6 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 0.020 ID = 23 A TJ = 25°C 0.015 0.010 0.005 0.000 0 2 4 6 8 10 0.008 TJ = 25°C VGS = 4.5 V 0.006 0.004 VGS = 10 V 0.002 10 20 30 40 50 60 VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 10000 1.8 1.6 VGS = 0 V ID = 23 A VGS = 4.5 V IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 100 0 5 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 10 V 1.4 1.2 1.0 TJ = 150°C 1000 TJ = 125°C 100 0.8 0.6 −50 10 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage www.onsemi.com 3 30 NVTFS4824N TYPICAL CHARACTERISTICS VGS, GATE−TO−SOURCE VOLTAGE (V) C, CAPACITANCE (pF) 2500 VGS = 0 V TJ = 25°C 2000 Ciss 1500 1000 500 0 Coss Crss 0 10 20 30 8 6 4 Qgd Qgs 2 0 ID = 23 A TJ = 25°C 0 10 20 30 Qg, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total Charge IS, SOURCE CURRENT (A) 60 VDD = 15 V ID = 23 A VGS = 4.5 V td(off) 100 t, TIME (ns) QT GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V) 1000 tr td(on) 10 tf 1 1 10 100 0.1 0.01 0.1 20 0 0.40 0.50 0.60 0.70 0.80 0.90 RG, GATE RESISTANCE (W) Figure 10. Diode Forward Voltage vs. Current 75 1 ms 10 1 40 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 10 ms 100 ms VGS = 4.5 V Single Pulse TC = 25°C RDS(on) Limit Thermal Limit Package Limit 1 10 ms dc 10 EAS, SINGLE PULSE DRAIN−TO− SOURCE AVALANCHE ENERGY (mJ) 100 VGS = 0 V TJ = 25°C VSD, SOURCE−TO−DRAIN VOLTAGE (V) 1000 ID, DRAIN CURRENT (A) 10 100 ID = 38 A 50 25 0 25 50 75 100 125 150 VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE(°C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature www.onsemi.com 4 175 NVTFS4824N TYPICAL CHARACTERISTICS 10 RYJ_mb−top R(t) (°C/W) Duty Cycle = 0.5 0.2 1 0.1 0.05 0.02 0.1 0.01 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 PULSE TIME (sec) Figure 13. Thermal Response DEVICE ORDERING INFORMATION Marking Package Shipping† NVTFS4824NTAG 4824 WDFN8 (Pb−Free) 1500 / Tape & Reel NVTFS4824NWFTAG 24WF WDFN8 (Pb−Free) 1500 / Tape & Reel NVTFS4824NTWG 4824 WDFN8 (Pb−Free) 5000 / Tape & Reel NVTFS4824NWFTWG 24WF WDFN8 (Pb−Free) 5000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WDFN8 3.3x3.3, 0.65P CASE 511AB ISSUE D 1 SCALE 2:1 DATE 23 APR 2012 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A D1 B 2X 0.20 C 8 7 6 5 4X E1 E q c 1 2 3 4 A1 TOP VIEW 0.10 C A e SIDE VIEW 0.10 8X b C A B 0.05 C 4X DETAIL A 8X e/2 1 0.42 4 INCHES NOM 0.030 −−− 0.012 0.008 0.130 BSC 0.116 0.120 0.078 0.083 0.130 BSC 0.116 0.120 0.058 0.063 0.009 0.012 0.026 BSC 0.012 0.016 0.026 0.032 0.012 0.017 0.002 0.005 0.055 0.059 0_ −−− MIN 0.028 0.000 0.009 0.006 MAX 0.031 0.002 0.016 0.010 0.124 0.088 0.124 0.068 0.016 0.020 0.037 0.022 0.008 0.063 12 _ 0.65 PITCH PACKAGE OUTLINE 4X 0.66 M E3 8 5 D2 BOTTOM VIEW 1 3.60 L1 GENERIC MARKING DIAGRAM* XXXXX A Y WW G MILLIMETERS MIN NOM MAX 0.70 0.75 0.80 0.00 −−− 0.05 0.23 0.30 0.40 0.15 0.20 0.25 3.30 BSC 2.95 3.05 3.15 1.98 2.11 2.24 3.30 BSC 2.95 3.05 3.15 1.47 1.60 1.73 0.23 0.30 0.40 0.65 BSC 0.30 0.41 0.51 0.65 0.80 0.95 0.30 0.43 0.56 0.06 0.13 0.20 1.40 1.50 1.60 0_ −−− 12 _ SOLDERING FOOTPRINT* L G SEATING PLANE DETAIL A K E2 C 6X 0.10 C DIM A A1 b c D D1 D2 E E1 E2 E3 e G K L L1 M q XXXXX AYWWG G 0.75 2.30 0.57 0.47 2.37 3.46 DIMENSION: MILLIMETERS = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DOCUMENT NUMBER: DESCRIPTION: 98AON30561E WDFN8 3.3X3.3, 0.65P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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