DEMOTS2007Q

TS2007 3 W filter-free Class D audio power amplifer with 6-12 dB fixed gain select Features ■ Operating range from VCC = 2.4 V to 5.5 V ■ Standby mode active low ■ Output power: 1.4 W at 5 V or 0.45 W at 3.0 V into 8 Ω with 1% THD+N max. ■ Output power: 2.3 W at 5 V or 0.75 W at 3.0 V into 4 Ω with 1% THD+N max. ■ Fixed gain select: 6 dB or 12 dB ■ Low current consumption ■ Efficiency: 88% typ. ■ Signal-to-noise ratio: 94 dB typ. ■ PSRR: 63 dB typ at 217 Hz with 6 dB gain ■ PWM base frequency: 280 kHz ■ Low pop & click noise ■ Thermal shutdown protection ■ DFN8 3 x 3 mm package Applications ■ Cellular phones ■ PDAs ■ Notebook PCs e t e l ) s t( TS2007IQT - DFN8 c u d e t le o s b O ) s ( t c u d o Pr o r P TS2007IQT - DFN8 1 8 2 7 3 6 4 5 o s b Description O The TS2007 is a class D power audio amplifier. Able to drive up to 1.4 W into an 8 Ω load at 5 V, it achieves outstanding efficiency compared to typical class AB audio power amplifiers. The TS2007 is available in DFN8 3 x 3 mm leadfree packages. This device allows switching between two different gains: 6 or 12dB via a logic signal on the GS pin. A pop & click reduction circuitry provides low on/off switching noise while allowing the device to start within 5 ms. A standby function (active low) allows lowering the current consumption down to 10 nA typ. May 2011 Doc ID 13123 Rev 4 1/29 www.st.com 29 Contents TS2007 Contents 1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 2 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 3.1 Electrical characteristic tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 bs 7 2/29 o r P 4.1 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.2 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.3 Common-mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4 Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.5 Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6 Wake-up time (twu) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.7 Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.8 Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.9 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 e t le o s b O ) s ( t c u d o r P e Output filter considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 t e l o 5 O c u d Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.10 6 ) s t( Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Doc ID 13123 Rev 4 TS2007 1 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings Symbol Parameter Value Unit 6 V GND to VCC V Supply voltage (1) VCC Vi Input voltage (2) Toper Operating free air temperature range -40 to + 85 °C Tstg Storage temperature -65 to +150 °C Tj Maximum junction temperature Thermal resistance junction to ambient Rthja Pd ct u d o Internally limited HBM: human body model ESD MM: machine model Lead temperature (soldering, 10 sec) bs Minimum load resistor r P e t e l o Latch-up Latch-up immunity RL °C 200 Power dissipation ESD ) s ( 150 (3) (4) °C/W 2 kV 200 V Class A 260 °C 3.2 Ω 1. All voltage values are measured with respect to the ground pin. O ) 2. The magnitude of the input signal must never exceed VCC + 0.3 V / GND - 0.3 V. 3. The device is protected in case of over temperature by a thermal shutdown active @ 150 °C. s ( t c 4. Exceeding the power derating curves during a long period will cause abnormal operation. Table 2. Symbol VCC e t e ol VI u d o Pr Vic s b O Operating conditions VSTBY Parameter Supply voltage Input voltage range Input common mode voltage(1) Standby voltage input Device ON Device OFF Value Unit 2.4 to 5.5 V GND to VCC V GND+0.15 V to VCC-0.7 V V 1.4 ≤ VSTBY ≤ VCC GND ≤ VSTBY ≤ 0.4 (3) V GND ≤ VGS ≤ 0.4 1.4 ≤ VGS ≤ VCC V (2) GS Gain select input: Gain =12dB Gain = 6dB RL Load resistor ≥4 Ω Thermal resistance junction to ambient (4) 40 °C/W Rthja 1. I Voo I ≤ 35 mV max with both differential gains. 2. Without any signal on VSTBY, the device is in standby (internal 300 kΩ pull down resistor). 3. Minimum current consumption is obtained when VSTBY = GND. 4. When mounted on 4-layer PCB. Doc ID 13123 Rev 4 3/29 Typical application 2 TS2007 Typical application Figure 1. Typical application schematics VCC VCC Cs 1uF InCin Differential Input GS 4 INGain Select 3 TS2007 6 2 Input capacitors are optional IN+ Vcc OUT+ PWM + H Bridge ) s t( 8 Speaker 5 OUT- c u d Cin In+ Standby Control Oscillator Standby 7 1 Gnd e t le o s b VCC O ) VCC s ( t c Pr Cin Differential Input 2 GS 4 INGain Select 3 IN+ Vcc OUT+ PWM + H Bridge Standby Control bs OUT- 15 μH 2μF Load 15 μH 2μF Oscillator Standby 1 O 8 5 Cin In+ 4Ω LC Output Filter TS2007 Gnd 30 μH 1μF 7 e t e ol Cs 6 u d o VCC 1uF Input capacitors are optional In- o r P 30 μH 1μF 8Ω LC Output Filter VCC Table 3. External component descriptions Components 4/29 Functional description CS Supply capacitor that provides power supply filtering. Cin Input coupling capacitors (optional) that block the DC voltage at the amplifier input terminal. The capacitors also form a high pass filter with Zin (Fcl = 1 / (2 x Pi x Zin x Cin)). Doc ID 13123 Rev 4 TS2007 Typical application Table 4. Pin descriptions Pin number Pin name Pin description 1 STBY 2 GS Gain select input 3 IN+ Positive differential input 4 IN- Negative differential input 5 OUT- Negative differential output 6 VCC Power supply 7 GND Ground 8 OUT+ Positive differential output Standby pin ( active low ) e t le ) s t( c u d o r P o s b O ) s ( t c u d o r P e t e l o s b O Doc ID 13123 Rev 4 5/29 Electrical characteristics TS2007 3 Electrical characteristics 3.1 Electrical characteristic tables Table 5. VCC = +5 V, GND = 0 V, Vic=2.5 V, Tamb = 25 °C (unless otherwise specified) Symbol ICC Parameter ICC-STBY Typ. Max. Unit Supply current No input signal, no load 2.3 3.3 mA Standby current (1) No input signal, VSTBY = GND 10 1000 Voo Output offset voltage Floating inputs, RL = 8Ω Po Output power THD = 1% max, f = 1 kHz, RL = 4 Ω THD = 1% max, f = 1 kHz, RL = 8 Ω THD = 10% max, f = 1 kHz, RL = 4 Ω THD = 10% max, f = 1 kHz, RL = 8 Ω Min. ) s t( uc 25 d o r eP THD + N Total harmonic distortion + noise Po = 1WRMS, G = 6 dB, f =1 kHz, RL = 8 Ω Efficiency t e l o s b O 2.3 1.4 2.8 1.7 nA mV W 0.4 % Efficiency Po = 2.1 WRMS, RL = 4 Ω (with LC output filter) Po = 1.3 WRMS, RL = 8 Ω (with LC output filter) 84 90 % PSRR Power supply rejection ratio with inputs grounded, Cin=1µF (2) f = 217 Hz, RL = 8 Ω, Gain=6 dB,Vripple = 200 mVpp f = 217 Hz, RL = 8 Ω, Gain=12 dB, Vripple = 200 mVpp 63 60 dB CMRR Common mode rejection ratio 20 Hz < f < 20 kHz 60 dB )- s ( t c 11.5 5.5 12 6 12.5 6.5 dB l o s Single input impedance (3) 68 75 82 kΩ FPWM Pulse width modulator base frequency 190 280 370 kHz SNR Signal-to-noise ratio (A-weighting) Po=1.5 W, RL=4 Ω (with LC output filter) 94 tWU Wake-up time 5 Zin Ob 6/29 Pr Gain value GS =0 V GS = VCC ete Gain u d o Doc ID 13123 Rev 4 dB 10 ms TS2007 Electrical characteristics Table 5. VCC = +5 V, GND = 0 V, Vic=2.5 V, Tamb = 25 °C (unless otherwise specified) (continued) Symbol tSTBY VN Parameter Min. Typ. Standby time 5 Output voltage noise f = 20 Hz to 20 kHz, RL=4 Ω Unweighted (Filterless, G=6 dB) A-weighted (Filterless, G=6 dB) Unweighted (with LC output filter, G=6 dB) A-weighted (with LC output filter, G=6 dB) Unweighted (Filterless, G=12 dB) A-weighted (Filterless, G=12 dB) Unweighted (with LC output filter, G=12 dB) A-weighted (with LC output filter, G=12 dB) 74 50 69 49 94 65 86 64 1. Standby mode is active when VSTBY is tied to GND. Max. Unit ms μVRMS ) s t( c u d 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217Hz. 3. Independent of Gain configuration (6 or 12 dB) and between IN+ or IN- and GND. e t le o r P o s b O ) s ( t c u d o r P e t e l o s b O Doc ID 13123 Rev 4 7/29 Electrical characteristics TS2007 VCC = +4.2 V, GND = 0 V, Vic=2.1 V, Tamb = 25 °C (unless otherwise specified)(1) Table 6. Symbol ICC Parameter ICC-STBY Typ. Max. Unit Supply current No input signal, no load 2.1 3 mA Standby current (2) No input signal, VSTBY = GND 10 1000 nA 25 mV Voo Output offset voltage Floating inputs, RL = 8 Ω Po Output power THD = 1% max, f = 1 kHz, RL = 4 Ω THD = 1% max, f = 1 kHz, RL = 8 Ω THD = 10% max, f = 1 kHz, RL = 4 Ω THD = 10% max, f = 1 kHz, RL = 8 Ω Min. ) s t( 1.6 0.95 1.95 1.1 THD + N Total harmonic distortion + noise Po = 800 mWRMS, G = 6 dB, f =1 kHz, RL = 8 Ω Efficiency Efficiency Po = 1.5 WRMS, RL = 4 Ω (with LC output filter) Po = 0.95 WRMS, RL = 8 Ω (with LC output filter) W c u d o r P 0.45 % 85 90 % PSRR Power supply rejection ratio with inputs grounded, Cin = 1 µF (3) f = 217 Hz, RL = 8 Ω, Gain = 6 dB,Vripple = 200 mVpp f = 217 Hz, RL = 8 Ω, Gain = 12 dB, Vripple = 200 mVpp 63 60 dB CMRR Common mode rejection ratio 20 Hz < f < 20 kHz 60 dB Gain value GS = 0 V GS = VCC Gain ) s ( ct e t e l o s b O - u d o Single input impedance (4) Zin Pr 11.5 5.5 12 6 12.5 6.5 dB 68 75 82 kΩ 190 280 370 kHz FPWM Pulse width modulator base frequency SNR Signal-to-noise ratio (A-weighting) Po=1.2 W, RL=4 Ω (with LC output filter) 93 Wake-up time 5 Standby time 5 Output voltage noise f = 20 Hz to 20 kHz, RL=4 Ω Unweighted (Filterless, G=6 dB) A-weighted (Filterless, G=6 dB) Unweighted (with LC output filter, G=6 dB) A-weighted (with LC output filter, G=6 dB) Unweighted (Filterless, G=12 dB) A-weighted (Filterless, G=12 dB) Unweighted (with LC output filter, G=12 dB) A-weighted (with LC output filter, G=12 dB) 72 50 68 49 93 65 85 64 l o s ete tWU tSTBY Ob VN dB 10 ms ms μVRMS 1. All electrical values are guaranteed with correlation measurements at 2.4 V and 5 V. 2. Standby mode is active when VSTBY is tied to GND. 3. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 4. Independent of Gain configuration (6 or 12 dB) and between IN+ or IN- and GND. 8/29 Doc ID 13123 Rev 4 TS2007 Electrical characteristics VCC = +3.6 V, GND = 0 V, Vic=1.8 V, Tamb = 25 °C (unless otherwise specified)(1) Table 7. Symbol Parameter ICC ICC-STBY Typ. Max. Unit Supply current No input signal, no load 2 2.8 mA Standby current (2) No input signal, VSTBY = GND 10 1000 nA 25 mV Voo Output offset voltage Floating inputs, RL = 8 Ω Po Output power THD+N = 1% max, f = 1 kHz, RL = 4 Ω THD+N = 1% max, f = 1 kHz, RL = 8 Ω THD = 10% max, f = 1 kHz, RL = 4 Ω THD = 10% max, f = 1 kHz, RL = 8 Ω Min. ) s t( 1.1 0.65 1.4 0.85 THD + N Total harmonic distortion + noise Po = 500 mWRMS, G = 6 dB, f = 1 kHz, RL = 8 Ω Efficiency Efficiency Po = 1.1 WRMS, RL = 4 Ω (with LC output filter) Po = 0.65 WRMS, RL = 8 Ω (with LC output filter) W c u d ro 0.3 % 84 90 % PSRR Power supply rejection ratio with inputs grounded, Cin=1 µF (3) f = 217 Hz, RL = 8 Ω, Gain = 6 dB, Vripple = 200 mVpp f = 217 Hz, RL = 8 Ω, Gain = 12 dB, Vripple = 200 mVpp 63 60 dB CMRR Common mode rejection ratio 20 Hz < f < 20 kHz 60 dB Gain Gain value GS = 0 V GS = VCC Zin FPWM so Ob tSTBY VN l o s Ob s ( t c 11.5 5.5 12 6 12.5 6.5 dB Single input impedance (4) 68 75 82 kΩ Pulse width modulator base frequency 190 280 370 kHz e t e l SNR tWU )- P e et u d o Pr Signal-to-noise ratio (A-weighting) Po = 0.9 W, RL = 4 Ω (with LC output filter) 92 Wake-up time 5 Standby time 5 Output voltage noise f = 20 Hz to 20 kHz, RL=4 Ω Unweighted (Filterless, G=6 dB) A-weighted (Filterless, G=6 dB) Unweighted (with LC output filter, G=6 dB) A-weighted (with LC output filter, G=6 dB) Unweighted (Filterless, G=12 dB) A-weighted (Filterless, G=12 dB) Unweighted (with LC output filter, G=12 dB) A-weighted (with LC output filter, G=12 dB) 72 50 68 49 93 65 85 64 dB 10 ms ms μVRMS 1. All electrical values are guaranteed with correlation measurements at 2.4 V and 5 V. 2. Standby mode is active when VSTBY is tied to GND. 3. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 4. Independent of Gain configuration (6 or 12 dB) and between IN+ or IN- and GND. Doc ID 13123 Rev 4 9/29 Electrical characteristics TS2007 VCC = +3.0 V, GND = 0 V, Vic=1.5 V, Tamb = 25 °C (unless otherwise specified)(1) Table 8. Symbol ICC Parameter ICC-STBY Typ. Max. Unit Supply current No input signal, no load 1.9 2.7 mA Standby current (2) No input signal, VSTBY = GND 10 1000 nA 25 mV Voo Output offset voltage Floating inputs, RL = 8 Ω Po Output power THD+N = 1% Max, f = 1 kHz, RL = 4 Ω THD+N = 1% Max, f = 1 kHz, RL = 8 Ω THD = 10% Max, f = 1 kHz, RL = 4 Ω THD = 10% Max, f = 1 kHz, RL = 8 Ω Min. ) s t( 0.75 0.45 1 0.6 THD + N Total harmonic distortion + noise Po = 400 mWRMS, G = 6 dB, f = 1 kHz, RL = 8 Ω Efficiency Efficiency Po = 0.75 WRMS, RL = 4 Ω (with LC output filter) Po = 0.45 WRMS, RL = 8 Ω (with LC output filter) W c u d o r P 0.5 % 83 90 % PSRR Power supply rejection ratio with inputs grounded, Cin = 1 µF (3) f = 217 Hz, RL = 8 Ω, Gain=6 dB,Vripple = 200 mVpp f = 217 Hz, RL = 8 Ω, Gain=12 dB, Vripple = 200 mVpp 63 60 dB CMRR Common mode rejection ratio 20 Hz < f < 20 kHz 60 dB Gain Gain value GS = 0 V GS = VCC Zin FPWM l o s Ob tSTBY VN l o s Ob s ( t c 11.5 5.5 12 6 12.5 6.5 dB Single input impedance (4) 68 75 82 kΩ Pulse width modulator base frequency 190 280 370 kHz ete SNR tWU )- e t e u d o Pr Signal-to-noise ratio (A-weighting) Po = 0.6 W, RL = 4 Ω (with LC output filter) 90 Wake-up time 5 Standby time 5 Output voltage noise f = 20 Hz to 20 kHz, RL=4 Ω Unweighted (Filterless, G=6 dB) A-weighted (Filterless, G=6 dB) Unweighted (with LC output filter, G=6 dB) A-weighted (with LC output filter, G=6 dB) Unweighted (Filterless, G=12 dB) A-weighted (Filterless, G=12 dB) Unweighted (with LC output filter, G=12 dB) A-weighted (with LC output filter, G=12 dB) 71 50 67 49 92 65 85 64 dB 10 ms ms μVRMS 1. All electrical values are guaranteed with correlation measurements at 2.4 V and 5 V. 2. Standby mode is active when VSTBY is tied to GND. 3. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 4. Independent of Gain configuration (6 or 12 dB) and between IN+ or IN- and GND. 10/29 Doc ID 13123 Rev 4 TS2007 Electrical characteristics Table 9. VCC = +2.4 V, GND = 0 V, Vic=1.2 V, Tamb = 25 °C (unless otherwise specified) Symbol Parameter ICC ICC-STBY Typ. Max. Unit Supply current No input signal, no load 1.7 2.4 mA Standby current (1) No input signal, VSTBY = GND 10 1000 nA 25 mV Voo Output offset voltage Floating inputs, RL = 8 Ω Po Output power THD+N = 1% Max, f = 1 kHz, RL = 4 Ω THD+N = 1% Max, f = 1 kHz, RL = 8 Ω THD = 10% Max, f = 1 kHz, RL = 4 Ω THD = 10% Max, f = 1 kHz, RL = 8 Ω Min. ) s t( 0.48 0.3 0.6 0.36 THD + N Total harmonic distortion + noise Po = 200 mWRMS, G = 6 dB, f = 1 kHz, RL = 8 Ω Efficiency Efficiency Po = 0.38 WRMS, RL = 4 Ω (with LC output filter) Po = 0.25 WRMS, RL = 8 Ω (with LC output filter) W c u d ro 0.1 % 82 90 % PSRR Power supply rejection ratio with inputs grounded, Cin = 1 µF (2) f = 217 Hz, RL = 8 Ω, Gain=6 dB,Vripple = 200 mVpp f = 217 Hz, RL = 8 Ω, Gain=12 dB, Vripple = 200 mVpp 63 60 dB CMRR Common mode rejection ratio 20 Hz < f < 20 kHz 60 dB Gain Gain value GS = 0 V GS = VCC Zin FPWM so Ob tSTBY VN l o s Ob s ( t c 11.5 5.5 12 6 12.5 6.5 dB Single input impedance (3) 68 75 82 kΩ Pulse width modulator base frequency 190 280 370 kHz e t e l SNR tWU )- P e et u d o Pr Signal-to-noise ratio (A-weighting) Po=0.4 W, RL=4 Ω (with LC output filter) 88 Wake-up time 5 Standby time 5 Output voltage noise f = 20 Hz to 20 kHz, RL = 4 Ω Unweighted (filterless, G=6 dB) A-weighted (filterless, G=6 dB) Unweighted (with LC output filter, G=6 dB) A-weighted (with LC output filter, G=6 dB) Unweighted (filterless, G=12 dB) A-weighted (filterless, G=12 dB) Unweighted (with LC output filter, G=12 dB) A-weighted (with LC output filter, G=12 dB) 70 50 66 49 91 65 84 64 dB 10 ms ms μVRMS 1. Standby mode is active when VSTBY is tied to GND. 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 3. Independent of Gain configuration (6 or 12 dB) and between IN+ or IN- and GND. Doc ID 13123 Rev 4 11/29 Electrical characteristics 3.2 TS2007 Electrical characteristic curves The graphs shown in this section use the following abbreviations: ● RL+ 15 µH or 30 µH = pure resistor + very low series resistance inductor ● Filter = LC output filter (1 µF+30 µH for 4 Ω and 0.5 µF+60 µH for 8 Ω) All measurements are done with CS1=1 µF and CS2=100 nF (see Figure 2, except for the PSRR where CS1 is removed (see Figure 3). Figure 2. Test diagram for measurements Cs1 1μF VCC Cs2 100nF GND ) s t( GND Out+ In+ In- or LC Filter (s) Pr ete VCC Audio Measurement Bandwith < 30kHz Cs2 100nF 20Hz to 20kHz Vripple GND 1μF Cin Vcc GND RL 4 or 8 Ω Out+ In+ 15 μH or 30 μH TS2007 In- GND or 50kHz low-pass filter Out- GND 5th order 50kHz low-pass filter reference 5th order LC Filter Cin 1μF 12/29 50kHz low-pass filter Test diagram for PSRR measurements l o s Ob 5th order b O - ct Figure 3. l o s Out- GND u d o e t e 15 μH or 30 μH TS2007 Cin o r P RL 4 or 8 Ω Cin c u d RMS Selective Measurement Bandwith =1% of Fmeas Doc ID 13123 Rev 4 TS2007 Electrical characteristics Table 10. Index of graphics Description Figure Current consumption vs. power supply voltage Figure 4 Current consumption vs. standby voltage Figure 5 Efficiency vs. output power Figure 6 - Figure 9 Output power vs. power supply voltage Figure 10, Figure 11 PSRR vs. common mode input voltage Figure 12 PSRR vs. frequency Figure 13 - Figure 17 ) s t( CMRR vs. common mode input voltage Figure 18 CMRR vs. frequency Figure 19 - Figure 23 Gain vs. frequency Figure 24, Figure 25 THD+N vs. output power Figure 26 - Figure 33 c u d THD+N vs. frequency o r P Figure 34 - Figure 45 Power derating curves e t e Startup and shutdown time l o s ) s ( ct Figure 46 Figure 47 - Figure 49 b O - u d o r P e t e l o s b O Doc ID 13123 Rev 4 13/29 Electrical characteristics Figure 4. TS2007 Current consumption vs. power supply voltage Figure 5. 3.0 Current consumption vs. standby voltage 2.5 No Loads 2.0 1.5 1.0 0.5 2 3 4 V CC =5V 1.5 1.0 0 1 2 200 100 160 80 80 ct Vcc=3V RL=4 Ω + ≥ 15 μ H F=1kHz THD+N ≤ 1% r P e 0.6 0.7 t e l o Figure 8. Efficiency vs. output power O Efficiency (%) 80 Efficiency Power Dissipation 0 0.0 14/29 0.1 0.2 0.3 Output Power (W) 0.4 200 100 40 80 20 Vcc=3V RL=8 Ω + ≥ 15 μH F=1kHz THD+N ≤ 1% 20 40 50 30 60 40 300 Power Dissipation 0.5 Figure 9. bs 10 0 0.5 400 60 0 0.0 0 0.8 500 Efficiency 20 Efficiency (%) u d o 0.3 0.4 0.5 Output Power (W) 40 Efficiency (%) (s) 40 100 b O - 120 Power Dissipation Power Dissipation (mW) 60 Power Dissipation (mW) Efficiency (%) 80 0.2 5 Efficiency vs. output power l o s Efficiency 0.1 4 P e et Figure 7. 100 0 0.0 No Load T AMB=25°C Standby Voltage (V) Efficiency vs. output power 20 uc 3 d o r Power Supply Voltage (V) Figure 6. ) s t( 0.5 0.0 5 V CC=3.6V V CC =2.4V Vcc=5V RL=4Ω + ≥ 15μ H F=1kHz THD+N ≤ 1% 1.0 1.5 Output Power (W) 0 2.5 2.0 Efficiency vs. output power 125 100 Efficiency 75 60 Power Dissipation 40 Doc ID 13123 Rev 4 50 Vcc=5V RL=8Ω + ≥ 15μ H F=1kHz THD+N ≤ 1% 20 0 0.0 100 Power Dissipation (mW) 0.0 2.0 0.2 0.4 0.6 0.8 Output Power (W) 1.0 1.2 25 0 1.4 Power Dissipation (mW) 2.5 Current Consumption (mA) Current Consumption (mA) T AMB =25°C TS2007 Electrical characteristics Figure 10. Output power vs. power supply voltage Figure 11. Output power vs. power supply voltage 3.5 2.0 2.0 THD+N=10% Output power (W) 3.0 RL = 8Ω + ≥ 15μ H F = 1kHz BW < 30kHz Tamb = 25°C 1.6 Output power (W) 2.5 RL = 4Ω + ≥ 15 μ H F = 1kHz BW < 30kHz Tamb = 25°C 1.5 1.0 THD+N=1% 1.2 THD+N=10% 0.8 ) s t( THD+N=1% 0.4 0.5 0.0 2 3 4 5 Power Supply Voltage (V) 0.0 6 l o s Inputs grounded, Vripple = 200mVpp, V CC =5V, R L=4Ω +15μH, C IN =1μF, TAMB =25°C -10 Ob )- -30 -40 Vcc=2.4V s ( t c Vcc=3.6, 4.2, 5V Vcc=3V -50 u d o -70 -80 0.0 0.5 1.0 1.5 Pr 2.0 2.5 3.0 3.5 PSRR (dB) -20 -60 -30 Gain=12dB -40 Gain=6dB -50 -60 -70 -80 4.0 4.5 20 5.0 100 Common Mode Input Voltage (V) e t e ol s b O -10 PSRR (dB) -30 Vcc=2.4, 3, 3.6, 4.2, 5V -50 -40 -60 -70 -70 1k 10k 20k 10k 20k Vcc=2.4, 3, 3.6, 4.2, 5V -50 -60 100 Inputs grounded, Vripple = 200mVpp A V =6dB, R L=4Ω +30μ H, C IN =1μ F, T AMB =25°C -10 -30 20 20k 0 Inputs grounded, Vripple = 200mVpp A V =6dB, R L=4Ω +15 μH, C IN =1μF, TAMB =25°C -20 -80 10k Figure 15. PSRR vs. frequency -20 -40 1k Frequency (Hz) Figure 14. PSRR vs. frequency PSRR (dB) 6 P e et 0 Vripple = 200mVpp, F = 217Hz, G = 6dB RL ≥ 4Ω + ≥ 15 μ H, Tamb = 25°C -20 0 uc 4 5 Power Supply Voltage (V) Figure 13. PSRR vs. frequency 0 -10 3 d o r Figure 12. PSRR vs. common mode input voltage PSRR(dB) 2 -80 20 Frequency (Hz) 100 1k Frequency (Hz) Doc ID 13123 Rev 4 15/29 Electrical characteristics TS2007 Figure 16. PSRR vs. frequency Figure 17. PSRR vs. frequency 0 0 Inputs grounded, Vripple = 200mVpp A V =6dB, R L=8Ω +15 μH, C IN =1μF, TAMB =25°C -20 -20 -30 -30 -40 Vcc=2.4, 3, 3.6, 4.2, 5V -50 -40 -60 -70 -70 100 20 1k 10k Vcc=2.4, 3, 3.6, 4.2, 5V -50 -60 -80 Inputs grounded, Vripple = 200mVpp A V =6dB, R L=8Ω +30μ H, C IN =1μ F, T AMB =25°C -10 PSRR (dB) PSRR (dB) -10 -80 20k 100 20 1k c u d Frequency (Hz) Frequency (Hz) Figure 18. CMRR vs. common mode input voltage O ) Vcc=3.6, 4.2, 5V Vcc=3V CMRR (dB) Vcc=2.4V s ( t c -50 -60 du -70 -80 0.0 0.5 1.0 1.5 ro 2.0 2.5 P e 3.0 3.5 4.5 -60 Gain=6dB 100 20 5.0 O Figure 21. CMRR vs. frequency 0 Δ Vicm=200mVpp, G=6dB R L= 4Ω +15μ H, C IN=1 μF, TAMB =25°C CMRR (dB) CMRR (dB) -20 -30 Vcc=2.4, 3, 3.6, 4.2, 5V -50 -30 -50 -60 -70 -70 20 100 1k 10k 20k Vcc=2.4, 3, 3.6, 4.2, 5V -40 -60 -80 Δ Vicm=200mVpp, G=6dB R L= 4Ω +30μ H, C IN =1μ F, T AMB =25°C -10 -20 -40 -80 20 Frequency (Hz) 16/29 1k Frequency (Hz) t e l o -10 20k Gain=12dB -50 -70 Figure 20. CMRR vs. frequency 0 10k -40 Common Mode Input Voltage (V) bs 20k -30 -80 4.0 10k o s b R L=4Ω +15μ H, C IN =1μ F, T AMB =25°C -20 -40 o r P Δ Vicm=200mVpp, V CC =5V -10 -20 PSRR(dB) e t le 0 Δ Vicm=200mVpp, F = 217Hz, G=6dB RL ≥ 4Ω + ≥ 15 μ H, T AMB =25°C -30 20k Figure 19. CMRR vs. frequency 0 -10 ) s t( 10k 100 1k Frequency (Hz) Doc ID 13123 Rev 4 TS2007 Electrical characteristics Figure 22. CMRR vs. frequency Figure 23. CMRR vs. frequency 0 0 Δ Vicm=200mVpp, G=6dB R L= 8Ω +15μ H, C IN=1 μF, TAMB =25°C -10 -20 CMRR (dB) -20 CMRR (dB) Δ Vicm=200mVpp, G=6dB R L= 8Ω +30μ H, C IN =1μ F, T AMB =25°C -10 -30 Vcc=2.4, 3, 3.6, 4.2, 5V -40 -50 -30 -50 -60 -60 -70 -70 -80 100 20 1k 10k Vcc=2.4, 3, 3.6, 4.2, 5V -40 -80 20k 100 20 1k c u d Frequency (Hz) Frequency (Hz) Figure 24. Gain vs. frequency 8 e t le no load o s b 12 RL=8Ω +15 μH ) s ( ct RL=8 Ω +30μ H 0 Gain = 6dB Vin = 500 mVpp T AMB = 25°C 20 100 -O du o r P 10k THD + N (%) Ob 1 RL = 4Ω + 15μ H F = 1kHz G = 6dB BW < 30kHz Tamb = 25°C 6 20k RL=4Ω +15μ H Gain = 12dB Vin = 500 mVpp T AMB = 25°C 20 RL=4Ω +30μ H 100 1k 10k 20k Frequency (Hz) Figure 27. THD+N vs. output power 10 Vcc=5V Vcc=3.6V Vcc=2.4V 0.1 1E-3 no load RL=8Ω +30μ H THD + N (%) l o s o r P RL=8Ω +15μ H 8 RL=4 Ω +30μ H Figure 26. THD+N vs. output power 10 10 RL=4 Ω +15μ H 1k Frequency (Hz) ete PSRR (dB) PSRR (dB) 6 2 20k Figure 25. Gain vs. frequency 14 4 ) s t( 10k 1 RL = 4Ω + 30μ H F = 1kHz G = 6dB BW < 30kHz Tamb = 25°C Vcc=5V Vcc=3.6V Vcc=2.4V 0.1 0.01 0.1 Output Power (W) 1 3 1E-3 Doc ID 13123 Rev 4 0.01 0.1 Output Power (W) 1 3 17/29 Electrical characteristics TS2007 Figure 28. THD+N vs. output power Figure 29. THD+N vs. output power 1 10 RL = 8 Ω + 15μ H F = 1kHz G = 6dB BW < 30kHz Tamb = 25°C Vcc=5V Vcc=3.6V Vcc=2.4V THD + N (%) THD + N (%) 10 0.1 0.01 0.1 Output Power (W) 1 2 Figure 30. THD+N vs. output power 1E-3 THD + N (%) THD + N (%) Vcc=2.4V 0.01 ete s ( t c du 0.1 Output Power (W) o r P 1 3 Figure 32. THD+N vs. output power THD + N (%) RL = 8Ω + 15μ H F = 100Hz G = 6dB BW < 30kHz Tamb = 25°C 2 o r P e t le RL = 4 Ω + 30μ H F = 100Hz G = 6dB BW < 30kHz Tamb = 25°C 1 Vcc=5V Vcc=3.6V Vcc=2.4V 0.01 1E-3 0.01 0.1 Output Power (W) 1 3 Figure 33. THD+N vs. output power 10 Vcc=5V Vcc=3.6V Vcc=2.4V 0.1 0.01 1E-3 1 0.1 THD + N (%) l o s 10 ) s t( c u d o s b Vcc=3.6V O ) 0.01 1E-3 18/29 Vcc=2.4V 0.01 0.1 Output Power (W) 10 Vcc=5V RL = 4Ω + 15μ H F = 100Hz G = 6dB BW < 30kHz Tamb = 25 °C 0.1 1 Vcc=3.6V Figure 31. THD+N vs. output power 10 Ob Vcc=5V 0.1 1E-3 1 1 RL = 8Ω + 30μ H F = 1kHz G = 6dB BW < 30kHz Tamb = 25°C 1 RL = 8Ω + 30μ H F = 100Hz G = 6dB BW < 30kHz Tamb = 25°C Vcc=5V Vcc=3.6V Vcc=2.4V 0.1 0.01 0.1 Output Power (W) 1 2 0.01 1E-3 Doc ID 13123 Rev 4 0.01 0.1 Output Power (W) 1 2 TS2007 Electrical characteristics Figure 34. THD+N vs. frequency Figure 35. THD+N vs. frequency 10 RL=4Ω + 30μ H G=6dB Bw < 30kHz Vcc=2.4V Tamb = 25°C Po=0.4W 1 THD + N (%) THD + N (%) 1 10 RL=4Ω + 15μ H G=6dB Bw < 30kHz Vcc=2.4V Tamb = 25°C 0.1 Po=0.4W 0.1 Po=0.2W Po=0.2W 0.01 20 100 10000 20k 1000 Frequency (Hz) Figure 36. THD+N vs. frequency 0.01 (s) ct 20 100 ete du 1000 Frequency (Hz) o r P b O - 10000 20k Figure 38. THD+N vs. frequency THD + N (%) 1 RL=4Ω + 15μ H G=6dB Bw < 30kHz Vcc=3.6V Tamb = 25°C ) s t( 1000 Frequency (Hz) c u d 10000 20k o r P Po=0.2W 0.1 Po=0.1W 0.01 20 100 1000 Frequency (Hz) 10000 20k Figure 39. THD+N vs. frequency 10 RL=4Ω + 30μ H G=6dB Bw < 30kHz Vcc=3.6V Tamb = 25°C Po=0.9W 1 THD + N (%) l o s 10 THD + N (%) THD + N (%) 1 RL=8Ω + 30 μH G=6dB Bw < 30kHz Vcc=2.4V Tamb = 25°C so Po=0.2W Po=0.1W Ob e t le 10 RL=8Ω + 15μ H G=6dB Bw < 30kHz Vcc=2.4V Tamb = 25°C 0.1 0.01 100 Figure 37. THD+N vs. frequency 10 1 20 0.1 Po=0.9W 0.1 Po=0.45W Po=0.45W 0.01 20 100 1000 Frequency (Hz) 10000 20k 0.01 20 Doc ID 13123 Rev 4 100 1000 Frequency (Hz) 10000 20k 19/29 Electrical characteristics TS2007 Figure 40. THD+N vs. frequency Figure 41. THD+N vs. frequency 10 10 RL=8Ω + 30μ H G=6dB Bw < 30kHz Vcc=3.6V Tamb = 25°C Po=0.5W 1 THD + N (%) THD + N (%) 1 RL=8Ω + 15μ H G=6dB Bw < 30kHz Vcc=3.6V Tamb = 25°C 0.1 Po=0.5W 0.1 Po=0.25W 0.01 20 100 10000 20k 1000 Frequency (Hz) Figure 42. THD+N vs. frequency 0.01 Po=1.5W 1 (s) 0.1 ct Po=0.75W 0.01 20 100 ete du 1000 Frequency (Hz) o r P 10000 20k 20 100 20/29 100 Po=1.5W 1000 Frequency (Hz) 10000 20k 10 RL=8Ω + 30μ H G=6dB Bw < 30kHz Vcc=5V Tamb = 25°C Po=0.9W 1 1000 Frequency (Hz) Po=0.9W 0.1 Po=0.45W Po=0.45W 20 o r P Figure 45. THD+N vs. frequency 0.1 0.01 c u d 10000 20k 0.1 0.01 THD + N (%) THD + N (%) RL=8Ω + 15μ H G=6dB Bw < 30kHz Vcc=5V Tamb = 25°C 1000 Frequency (Hz) Po=0.75W l o s 10 1 e t le RL=4Ω + 30μ H G=6dB Bw < 30kHz Vcc=5V Tamb = 25°C so b O - Figure 44. THD+N vs. frequency Ob 100 10 THD + N (%) THD + N (%) 1 20 Figure 43. THD+N vs. frequency 10 RL=4Ω + 15μ H G=6dB Bw < 30kHz Vcc=5V Tamb = 25°C ) s t( Po=0.25W 10000 20k 0.01 20 Doc ID 13123 Rev 4 100 1000 Frequency (Hz) 10000 20k TS2007 Electrical characteristics Figure 46. Power derating curves Figure 47. Startup and shutdown phase VCC=5 V, G=6 dB, Cin=1 µF, inputs grounded DFN8 Package Power Dissipation (W) 3.5 3.0 Mounted on a 4-layer PCB 2.5 No Heat sink 2.0 1.5 ) s t( 1.0 0.5 0.0 0 25 50 75 100 Ambiant Temperature (°C) 125 c u d Figure 48. Startup and shutdown phase VCC=5 V, G=6 dB, Cin=1 µF, Vin=1 Vpp, F=10 kHz 150 o r P Figure 49. Startup and shutdown phase VCC=5 V, G=12 dB, Cin=1 µF, Vin=1 Vpp, F=10 kHz e t le o s b O ) s ( t c u d o r P e t e l o s b O Doc ID 13123 Rev 4 21/29 Application information TS2007 4 Application information 4.1 Differential configuration principle The TS2007 is a monolithic fully-differential input/output class D power amplifier. The TS2007 also includes a common-mode feedback loop that controls the output bias value to average it at VCC/2 for any DC common-mode input voltage. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the output power. Moreover, as the load is connected differentially compared to a single-ended topology, the output is four times higher for the same power supply voltage. ) s t( The advantages of a full-differential amplifier are: 4.2 ● High PSRR (power supply rejection ratio) ● High common-mode noise rejection ● Virtually zero pop without additional circuitry, giving a faster startup time compared to conventional single-ended input amplifiers ● Easier interfacing with differential output audio DAC ● No input coupling capacitors required thanks to common-mode feedback loop c u d e t le o r P o s b Gain settings O ) In the flat region of the frequency-response curve (no input coupling capacitor or internal feedback loop + load effect), the differential gain can be set to either 6 or 12 dB depending on the logic level of the GS pin: GS s ( t c u d o e t e ol Note: s b O 4.3 Pr 1 0 Gain (dB) Gain (V/V) 6 dB 2 12 dB 4 Between the GS pin and VCC there is an internal 300 kΩ resistor. When the pin is floating the gain is 6 dB. Common-mode feedback loop limitations As explained previously, the common-mode feedback loop allows the output DC bias voltage to be averaged at VCC/2 for any DC common-mode bias input voltage. Due to the Vic limitation of the input stage (see Table 2: Operating conditions on page 3), the common-mode feedback loop can fulfill its role only within the defined range. 4.4 Low frequency response If a low frequency bandwidth limitation is required, it is possible to use input coupling capacitors. In the low frequency region, the input coupling capacitor Cin starts to have an effect. Cin forms, with the input impedance Zin, a first order high-pass filter with a -3 dB cutoff frequency (see Table 5 to Table 9). 22/29 Doc ID 13123 Rev 4 TS2007 Application information 1 F CL = ----------------------------------2 ⋅ π ⋅ Z in ⋅ C in So, for a desired cutoff frequency FCL we can calculate Cin: 1 C in = ------------------------------------2 ⋅ π ⋅ Z in ⋅ F CL with FCL in Hz, Zin in Ω and Cin in F. The input impedance Zin is for the whole power supply voltage range, typically 75 kΩ . There is also a tolerance around the typical value (see Table 5 to Table 9). With regard to the tolerance, you can also calculate tolerance of FCL: 4.5 ● F CLmax = 1.103 ⋅ F CL ● F CLmin = 0.915 ⋅ F CL ) s t( c u d Decoupling of the circuit e t le o r P A power supply capacitor, referred to as CS, is needed to correctly bypass the TS2007. o s b The TS2007 has a typical switching frequency of 280 kHz and output fall and rise time of about 5 ns. Due to these very fast transients, careful decoupling is mandatory. O ) A 1 µF ceramic capacitor is enough, but it must be located very close to the TS2007 in order to avoid any extra parasitic inductance created by a long track wire. Parasitic loop inductance, in relation with di/dt, introduces overvoltage that decreases the global efficiency of the device and may cause, if this parasitic inductance is too high, a TS2007 breakdown. s ( t c In addition, even if a ceramic capacitor has an adequate high frequency ESR value, its current capability is also important. A 0603 size is a good compromise, particularly when a 4 Ω load is used. u d o r P e Another important parameter is the rated voltage of the capacitor. A 1µF/6.3V capacitor used at 5 V, loses about 50% of its value. With a power supply voltage of 5 V, the decoupling value, instead of 1 µF, could be reduced to 0.5 µF. As CS has particular influence on the THD+N in the medium to high frequency region, this capacitor variation becomes decisive. In addition, less decoupling means higher overshoots which can be problematic if they reach the power supply AMR value (6 V). t e l o s b O 4.6 Wake-up time (twu) When the standby is released to set the device ON, there is a wait of 5 ms typically. The TS2007 has an internal digital delay that mutes the outputs and releases them after this time in order to avoid any pop noise. Note: The gain increases smoothly (see Figure 49) from the mute to the gain selected by the GS pin (Section 4.2). Doc ID 13123 Rev 4 23/29 Application information 4.7 TS2007 Shutdown time When the standby command is set, the time required to put the two output stages into high impedance and to put the internal circuitry in shutdown mode, is typically 5 ms. This time is used to decrease the gain and avoid any pop noise during shutdown. Note: The gain decreases smoothly until the outputs are muted (see Figure 49). 4.8 Consumption in shutdown mode Between the shutdown pin and GND there is an internal 300 kΩ resistor. This resistor forces the TS2007 to be in shutdown when the shutdown input is left floating. ) s t( However, this resistor also introduces additional shutdown power consumption if the shutdown pin voltage is not 0 V. c u d Referring to Table 2: Operating conditions on page 3, with a 0.4 V shutdown voltage pin for example, you must add 0.4V/300k = 1.3 µA in typical (0.4V/273 k = 1.46 µA in maximum) to the shutdown current specified in Table 5 to Table 9. 4.9 o r P e t le Single-ended input configuration o s b It is possible to use the TS2007 in a single-ended input configuration. However, input coupling capacitors are needed in this configuration. The following schematic diagram shows a typical single-ended input application. O ) Figure 50. Typical application for single-ended input configuration s ( t c VCC u d o bs O Input Cin 6 GS 4 INGain Select 3 IN+ OUT+ PWM + Cin Standby Control H Bridge Oscillator 1 Standby Control Doc ID 13123 Rev 4 Gnd 8 5 OUT- Standby 24/29 TS2007 Vcc 7 t e l o 1uF Gain Select Control 2 r P e Cs Speaker TS2007 4.10 Application information Output filter considerations The TS2007 is designed to operate without an output filter. However, due to very sharp transients on the TS2007 output, EMI radiated emissions may cause some standard compliance issues. These EMI standard compliance issues can appear if the distance between the TS2007 outputs and loudspeaker terminal are long (typically more than 50 mm, or 100 mm in both directions, to the speaker terminals). As the PCB layout and internal equipment device are different for each configuration, it is difficult to provide a one-size-fits-all solution. However, to decrease the probability of EMI issues, there are several simple rules to follow: ● Reduce, as much as possible, the distance between the TS2007 output pins and the speaker terminals. ● Use a ground plane for “shielding” sensitive wires. ● Place, as close as possible to the TS2007 and in-series with each output, a ferrite bead with a rated current of minimum 2.5 A and impedance greater than 50 Ω at frequencies above 30 MHz. If, after testing, these ferrite beads are not necessary, replace them by a short-circuit. ● e t le ) s t( c u d o r P Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground (see Figure 51). o s b Figure 51. Ferrite chip bead placement O ) From TS2007 output s ( t c Ferrite chip bead u d o s b O e t e ol Pr to speaker about 100pF gnd In the case where the distance between the TS2007 output and the speaker terminals is too long, it is possible to have low frequency EMI issues due to the fact that the typical operating frequency is 280 kHz. In this configuration, it is necessary to use the output filter represented in Figure 1 on page 4 as close as possible to the TS2007. Doc ID 13123 Rev 4 25/29 Package information 5 TS2007 Package information In order to meet environmental requirements, STMicroelectronics offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics trademark. ECOPACK specifications are available at: www.st.com. Figure 52. Pinout (top view) 1 8 2 7 3 6 e t le 5 4 ) s t( c u d o r P o s b O ) Figure 53. Marking (top view) Logo: ST s ( t c Part number: K007 u d o Three digit date code: YWW The dot is for marking pin 1 r P e Figure 54. Recommended footprint for the TS2007 DFN8 package t e l o 1.8 mm s b O 0.8 mm 0.35 mm 2.2 mm 0.65 mm 1.4 mm 26/29 Doc ID 13123 Rev 4 TS2007 Package information Figure 55. DFN8 package mechanical data Dimensions Ref A Millimeters Mils Min Typ Max Min Typ Max 0.50 0.60 0.65 19.6 23.6 25.6 0.02 0.05 0.8 1.9 A1 A3 0.22 b 0.25 0.30 0.35 9.8 11.8 D 2.85 3.00 3.15 112.2 118.1 D2 1.60 1.70 1.80 63 66.9 E 2.85 3.00 3.15 112.2 118.1 E2 1.10 1.20 1.30 43.3 19.6 r P e s b O A1 A3 od t c u 21.6 ol 0.08 ) (s e t e 0.60 ddd C o r P 47.2 124 51.2 25.5 0.55 SEATING PLANE c u d 70.8 23.6 3.1 C 0.50 ) s t( 124 ddd L (1) 0.65 13.8 A e D e 1 2 3 4 8 7 6 5 E E2 t e l o s b O 8.6 b D2 1. The dimension of L is not compliant with JEDEC MO-248 which recommends 0.40 mm +/-0.10 mm. Note: The DFN8 package has an exposed pad E2 x D2. For enhanced thermal performance, the exposed pad must be soldered to a copper area on the PCB, acting as a heatsink. This copper area can be electrically connected to pin 7 or left floating. Doc ID 13123 Rev 4 27/29 Ordering information 6 TS2007 Ordering information Table 11. 7 Order code Part number Temperature range Package Marking TS2007IQT -40 °C, +85 °C DFN8 K07 Revision history Changes c u d Date Revision 11-Jan-2007 1 Initial release (preliminary data). 11-May-2007 2 First complete datasheet. This release of the datasheet includes electrical characteristics curves and application information. 24-May-2007 3 Corrected error in Table 4: Pin descriptions: descriptions of pin 5 and pin 8 were inverted. 02-May-2011 4 Added minimum RL to Table 1: Absolute maximum ratings e t le o s b O ) s ( t c u d o r P e t e l o s b O 28/29 ) s t( Doc ID 13123 Rev 4 o r P TS2007 ) s t( Please Read Carefully: c u d Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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All other names are the property of their respective owners. © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com Doc ID 13123 Rev 4 29/29