0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
STF13N60DM2

STF13N60DM2

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT78

  • 描述:

    N-CHANNEL600V,0.310OHMTYP.,

  • 数据手册
  • 价格&库存
STF13N60DM2 数据手册
STF13N60DM2 Datasheet N-channel 600 V, 0.310 Ω typ., 11 A MDmesh™ DM2 Power MOSFET in a TO-220FP package 2 1 3 TO-220FP D(2) • • • • • • Order codes VDS RDS(on) max. ID STF13N60DM2 600 V 0.365 Ω 11 A Fast-recovery body diode Extremely low gate charge and input capacitance Low on-resistance 100% avalanche tested Extremely high dv/dt ruggedness Zener-protected Applications • Switching applications G(1) Description S(3) AM15572v1_no_tab This high-voltage N-channel Power MOSFET is part of the MDmesh™ DM2 fastrecovery diode series. It offers very low recovery charge (Qrr) and time (trr) combined with low RDS(on), rendering it suitable for the most demanding high-efficiency converters and ideal for bridge topologies and ZVS phase-shift converters. Product status links STF13N60DM2 Product summary Order code STF13N60DM2 Marking 13N60DM2 Package TO-220FP Packing Tube DS11595 - Rev 3 - November 2018 For further information contact your local STMicroelectronics sales office. www.st.com STF13N60DM2 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit Gate-source voltage ±25 V Drain current (continuous) at Tcase = 25 °C 11 (1) Drain current (continuous) at Tcase = 100 °C 7 (1) IDM (2) Drain current (pulsed) 44 (1) A PTOT Total power dissipation at Tcase = 25 °C 25 W dv/dt (3) Peak diode recovery voltage slope 40 dv/dt(4) MOSFET dv/dt ruggedness 50 VGS ID Parameter VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) Tstg Storage temperature range Tj Operating junction temperature range A V/ns 2500 V -55 to 150 °C Value Unit 1. Limited by maximum junction temperature. 2. Pulse width limited by safe operating area. 3. ISD ≤ 11 A, di/dt ≤ 900 A/μs; VDS peak < V(BR)DSS, VDD=400 V. 4. VDS ≤ 480 V. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient 5 62.5 °C/W Table 3. Avalanche characteristics Symbol IAR EAS DS11595 - Rev 3 Parameter Avalanche current, repetitive or not repetitive (Pulse width limited by Tjmax) Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Value Unit 2.5 A 340 mJ page 2/13 STF13N60DM2 Electrical characteristics 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 4. Static Symbol V(BR)DSS Parameter Drain-source breakdown voltage Test conditions VGS = 0 V, ID = 1 mA Min. Typ. 600 Zero gate voltage drain current IGSS 1.5 VGS = 0 V, VDS = 600 V, Tcase = 125 °C 100 (1) Gate-body leakage current VDS = 0 V, VGS = ±25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 5.5 A Unit V VGS = 0 V, VDS = 600 V IDSS Max. µA ±10 µA 4 5 V 0.310 0.365 Ω Min. Typ. Max. Unit - 730 - - 38 - - 0.9 - 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Reverse transfer capacitance (1) pF Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 70 - pF RG Intrinsic gate resistance f = 1 MHz, ID= 0 A - 5.1 - Ω Qg Total gate charge - 19 - Qgs Gate-source charge - 4.4 - Qgd Gate-drain charge - 9.9 - Coss eq. VDD = 480 V, ID = 11 A, VGS = 0 to 10 V (see Figure 14. Test circuit for gate charge behavior) nC 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS11595 - Rev 3 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time Fall time VDD = 300 V, ID = 5.5 A, RG = 4.7 Ω, VGS = 10 V (see Figure 13. Test circuit for resistive load switching times and Figure 18. Switching time waveform) Min. Typ. Max. - 12.3 - - 4.8 - - 42.5 - - 10.6 - Unit ns page 3/13 STF13N60DM2 Electrical characteristics Table 7. Source-drain diode Symbol ISD ISDM (1) VSD (2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 11 A Source-drain current (pulsed) - 44 A - 1.6 V VGS = 0 V, ISD = 11 A Forward on voltage trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15. Test circuit for inductive load switching and diode recovery times) ISD = 11 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 15. Test circuit for inductive load switching and diode recovery times) - 90 ns - 252 nC - 5.6 A - 170 ns - 667 nC - 8.6 A Min. Typ. Max. Unit ±30 - - V 1. Pulse width is limited by safe operating area. 2. Pulse test: pulse duration = 300 µs, duty cycle 1.5%. Table 8. Gate-source Zener diode Symbol V(BR)GSO Parameter Test conditions Gate-source breakdown voltage IGS = ±250 μA, ID = 0 A The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need for additional external componentry. DS11595 - Rev 3 page 4/13 STF13N60DM2 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 2. Thermal impedance Figure 1. Safe operating area ID (A) Operation in this area is limited by R DS(on) K GIPG080420161019SOA GC20940_ZTH δ=0.5 0.1 δ=0.2 0.05 tp =1 µs 10 1 0.02 10 -1 0.01 Single pulse tp =10 µs tp =100 µs 10 0 TJ≤150 °C TC=25 °C VGS=10 V single pulse 10 -1 10 -1 10 10 0 tp =1 ms tp =10 ms 10 1 VDS (V) 2 Figure 3. Output characteristics ID (A) V GS = 8, 9, 10 V 20 10-3 10 -2 10 -1 10 0 tp(s) Figure 4. Transfer characteristics GIPG070420161613TCH V DS = 20 V 15 10 V GS = 6 V 5 5 V GS = 5 V 0 0 4 8 12 16 V DS (V) Figure 5. Gate charge vs gate-source voltage V GS (V) GIPG070420161614QVG V DS (V) 12 DS11595 - Rev 3 10-4 20 V GS = 7 V 10 600 V DD = 480 V I D = 11 A V DS 400 6 300 4 200 2 100 4 8 12 16 0 0 2 20 0 Q g (nC) 4 6 8 10 V GS (V) Figure 6. Static drain-source on-resistance R DS(on) (Ω) GIPG070420161610RID 0.33 V GS =10 V 500 8 0 0 -3 25 15 10 10 ID (A) GIPG070420161613OCH 25 10 -2 0.32 0.31 0.3 0.29 0 2 4 6 8 10 I D (A) page 5/13 STF13N60DM2 Electrical characteristics (curves) Figure 7. Capacitance variations C (pF) GIPG070420161612CVR 10 3 V GS(th) (norm.) C ISS GIPG060420161230VTH 1.1 I D = 250 µA 1.0 10 2 C OSS 0.9 C RSS 0.8 10 1 f = 1 MHz 10 Figure 8. Normalized gate threshold voltage vs temperature 0 0.7 10 -1 10 -1 10 0 10 1 V DS (V) 10 2 Figure 9. Normalized on-resistance vs temperature R DS(on) (norm.) GIPG070420161233RON 2.2 0.6 -75 1.04 1.4 1.00 1.0 0.96 0.6 0.92 -25 25 75 125 T j (°C) Figure 11. Output capacitance stored energy E OSS (µJ) GIPG070420161614EOS 75 V (BR)DSS (norm.) T j (°C) 0.88 -75 I D = 1 mA -25 25 75 125 T j (°C) Figure 12. Source- drain diode forward characteristics V SD (V) GIPG070420161612SDF 1.1 5 125 GIPG060420161354BDV 1.08 V GS = 10 V 25 Figure 10. Normalized V(BR)DSS vs temperature 1.8 0.2 -75 -25 T j = -50 °C 1.0 4 0.9 T j = 25 °C 3 0.8 2 0.7 1 0 0 DS11595 - Rev 3 T j = 150 °C 0.6 100 200 300 400 500 600 V DS (V) 0.5 0 2 4 6 8 10 I SD (A) page 6/13 STF13N60DM2 Test circuits 3 Test circuits Figure 13. Test circuit for resistive load switching times Figure 14. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A B B 3.3 µF D G + VD 100 µH fast diode B Figure 16. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 18. Switching time waveform Figure 17. Unclamped inductive waveform ton V(BR)DSS td(on) VD toff td(off) tr tf 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS11595 - Rev 3 page 7/13 STF13N60DM2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS11595 - Rev 3 page 8/13 STF13N60DM2 TO-220FP package information 4.1 TO-220FP package information Figure 19. TO-220FP package outline 7012510_Rev_12_B DS11595 - Rev 3 page 9/13 STF13N60DM2 TO-220FP package information Table 9. TO-220FP package mechanical data Dim. mm Min. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 DS11595 - Rev 3 Typ. 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 page 10/13 STF13N60DM2 Revision history Table 10. Document revision history DS11595 - Rev 3 Date Revision Changes 08-Apr-2016 1 First release. 07-Dec-2016 2 Document status promoted from preliminary to production data. 29-Nov-2018 3 Modified Figure 1. Safe operating area. Minor text changes. page 11/13 STF13N60DM2 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 DS11595 - Rev 3 page 12/13 STF13N60DM2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS11595 - Rev 3 page 13/13
STF13N60DM2 价格&库存

很抱歉,暂时无法提供与“STF13N60DM2”相匹配的价格&库存,您可以联系我们找货

免费人工找货