STL66DN3LLH5

STL66DN3LLH5 Automotive-grade dual N-channel 30 V, 5.9 mΩ typ., 20 A STripFET™ H5 Power MOSFET in a PowerFLAT™ 5x6 double island package Datasheet - production data Features Order code VDS RDS(on) max. ID PTOT STL66DN3LLH5 30 V 6.5 mΩ 20 A 4.7 W     Designed for automotive applications and AEC-Q101 qualified Logic level VGS(th) 175 °C maximum junction temperature Wettable flanks package Applications Figure 1: Internal schematic diagram  Switching applications Description This device is a dual N-channel Power MOSFET developed using STMicroelectronics’ STripFET™ H5 technology. The device has been optimized to achieve very low on-state resistance, contributing to a FoM that is among the best in its class. Table 1: Device summary Order code Marking Package Packing STL66DN3LLH5 66DN3LH5 PowerFLAT™ 5x6 double island Tape and reel August 2015 DocID022353 Rev 3 This is information on a product in full production. 1/15 www.st.com Contents STL66DN3LLH5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 5 2/15 4.1 PowerFLAT™ 5x6 double island WF type C package information .... 9 4.2 PowerFLAT™ 5x6 WF packing information .................................... 12 Revision history ............................................................................ 14 DocID022353 Rev 3 STL66DN3LLH5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ±22 V Drain current (continuous) at Tcase = 25 °C 78.5 Drain current (continuous) at Tcase = 100 °C 55.5 ID(1) ID(2) IDM(2)(3) Drain current (continuous) at Tpcb = 25 °C 20 Drain current (continuous) at Tpcb = 100 °C 14.2 Drain current (pulsed) 80 PTOT Total dissipation at Tcase = 25 °C 72 PTOT(1) Total dissipation at Tpcb = 25 °C 4.7 Tstg Storage temperature Tj Operating junction temperature A A A W -55 to 175 °C Value Unit Notes: (1) This value is rated according to Rthj-c (2) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. (3) Pulse width is limited by safe operating area. Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 2.08 Thermal resistance junction-pcb 32 Rthj-pcb (1) °C/W Notes: (1) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. Table 4: Avalanche characteristics Symbol IAV EAS(1) Parameter Value Unit Avalanche current, not repetitive 18.5 A Single pulse avalanche energy 270 mJ Notes: (1) starting Tj = 25 °C, ID = 38 A, VDD = 24 V. DocID022353 Rev 3 3/15 Electrical characteristics 2 STL66DN3LLH5 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 µA Min. Typ. Max. 30 Unit V VGS = 0 V, VDS = 30 V 1 VGS = 0 V, VDS = 30 V, TC = 125 °C 100 Gate-body leakage current VDS = 0 V, VGS = ±22 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 10 A 5.9 6.5 VGS = 4.5 V, ID = 10 A 7.1 7.9 Min. Typ. Max. - 1500 - - 230 - - 23 - - 12 - - 5 - - 4.4 - Min. Typ. Max. - 8.8 - - 18 - - 26 - - 4 - IDSS Zero gate voltage drain current IGSS 1 µA mΩ Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 15 V, ID = 19 A, VGS = 4.5 V (see Figure 14: "Test circuit for gate charge behavior") Unit pF nC Table 7: Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 15 V, ID = 9.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") DocID022353 Rev 3 Unit ns STL66DN3LLH5 Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 20 A ISDM(1) Source-drain current (pulsed) - 80 A VSD(2) Forward on voltage VGS = 0 V, ISD = 19 A - 1.1 V trr Reverse recovery time - 24 ns Qrr Reverse recovery charge - 12 nC IRRM Reverse recovery current ISD = 19 A, di/dt = 100 A/µs, VDD = 25 V, Tj = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 1.8 A Notes: (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DocID022353 Rev 3 5/15 Electrical characteristics 2.1 6/15 STL66DN3LLH5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance DocID022353 Rev 3 STL66DN3LLH5 Electrical characteristics Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics DocID022353 Rev 3 7/15 Test circuits 3 8/15 STL66DN3LLH5 Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform Figure 18: Switching time waveform DocID022353 Rev 3 STL66DN3LLH5 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 PowerFLAT™ 5x6 double island WF type C package information Figure 19: PowerFLAT™ 5x6 double island WF type C package outline DocID022353 Rev 3 9/15 Package information STL66DN3LLH5 Table 9: PowerFLAT™ 5x6 double island WF type C mechanical data mm Dim. Min. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 D 5.00 D2 1.68 E 6.20 E2 3.50 3.70 E4 0.55 0.75 E5 0.08 0.28 E6 2.35 2.55 E7 0.40 0.60 e L K 0.50 5.20 5.40 1.88 6.40 6.60 1.27 0.90 L1 10/15 Typ. 1.10 0.275 1.05 DocID022353 Rev 3 1.35 STL66DN3LLH5 Package information Figure 20: PowerFLAT™ 5x6 double island recommended footprint (dimensions are in mm) DocID022353 Rev 3 11/15 Package information 4.2 STL66DN3LLH5 PowerFLAT™ 5x6 WF packing information Figure 21: PowerFLAT™ 5x6 WF tape Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape 12/15 DocID022353 Rev 3 STL66DN3LLH5 Package information Figure 23: PowerFLAT™ 5x6 reel DocID022353 Rev 3 13/15 Revision history 5 STL66DN3LLH5 Revision history Table 10: Document revision history 14/15 Date Revision Changes 12-Oct-2011 1 First release. 14-Mar-2012 2 Document status changed from preliminary data to production data. Inserted Section 5: Packaging mechanical data. Minor text changes. 28-Aug-2015 3 Text and formatting changes throughout document Updated device marking information. Updated device package information. DocID022353 Rev 3 STL66DN3LLH5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID022353 Rev 3 15/15