STL66N3LLH5

STL66N3LLH5 Automotive-grade N-channel 30 V, 4.5 mΩ typ., 80 A STripFET™ H5 Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features      Order code VDS RDS(on) max. ID STL66N3LLH5 30 V 5.8 mΩ 80 A AEC-Q101 qualified Low on-resistance RDS(on) High avalanche ruggedness Low gate drive power loss Wettable flank package Applications  Figure 1: Internal schematic diagram Switching applications Description This device is an N-channel Power MOSFET developed using STMicroelectronics’ STripFET™ H5 technology. The device has been optimized to achieve very low on-state resistance, contributing to a FoM that is among the best in its class. Table 1: Device summary Order code Marking Package Packing STL66N3LLH5 66N3LLH5 PowerFLAT™ 5x6 Tape and reel May 2017 DocID022356 Rev 4 This is information on a product in full production. 1/16 www.st.com Contents STL66N3LLH5 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.1 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 9 4 Package information ..................................................................... 10 5 2/16 4.1 PowerFLAT™ 5x6 package information .......................................... 10 4.2 PowerFLAT™ 5X6 packing information .......................................... 13 Revision history ............................................................................ 15 DocID022356 Rev 4 STL66N3LLH5 1 Electrical ratings Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ±22 V Drain current (continuous) at Tcase = 25 °C 80 Drain current (continuous) at Tcase = 100 °C 57 Drain current (continuous) at Tpcb = 25 °C 21 Drain current (continuous) at Tpcb = 100 °C 14.5 ID(1) ID(2) IDM(2)(3) PTOT (1) PTOT(2) Drain current (pulsed) 84 Total dissipation at Tcase = 25 °C 72 Total dissipation at Tpcb = 25 °C 4.8 TJ Operating junction temperature range Tstg Storage temperature range -55 to 175 A A A W °C Notes: (1) This value is rated according to Rthj-c (2) This value is rated according to Rthj-pcb (3) Pulse width is limited by safe operating area. Table 3: Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 2.08 Thermal resistance junction-pcb 31.3 Rthj-pcb (1) Value Unit °C/W Notes: (1) When mounted on a 1-inch² FR-4, 2 Oz copper board, t < 10 s. Table 4: Avalanche characteristics Symbol Parameter Value Unit IAV Avalanche current, not repetitive 10.5 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAV, VDD = 24 V) 180 mJ DocID022356 Rev 4 3/16 Electrical characteristics 2 STL66N3LLH5 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 250 µA Min. Typ. Max. 30 Unit V VGS = 0 V, VDS = 30 V 1 VGS = 0 V, VDS = 30 V, TC = 125 °C(1) 10 Gate-body leakage current VDS = 0 V, VGS = ±22 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 V RDS(on) Static drain-source onresistance VGS = 10 V, ID = 10.5 A 4.5 5.8 VGS = 4.5 V, ID = 10.5 A 6 7.5 Min. Typ. Max. - 1500 - - 295 - - 39 - - 12 - - 4 - - 4.7 - Min. Typ. Max. - 9.3 - - 14.5 - - 22.7 - - 4.5 - IDSS Zero gate voltage drain current IGSS 1 µA mΩ Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 V VDD = 15 V, ID = 21 A, VGS = 0 to 4.5 V (see Figure 14: "Test circuit for gate charge behavior") Unit pF nC Table 7: Switching times Symbol td(on) tr td(off) tf 4/16 Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 15 V, ID = 10.5 A RG = 4.7 Ω, VGS = 10 V (see Figure 13: "Test circuit for resistive load switching times" and Figure 18: "Switching time waveform") DocID022356 Rev 4 Unit ns STL66N3LLH5 Electrical characteristics Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 21 A ISDM(1) Source-drain current (pulsed) - 84 A VSD(2) Forward on voltage VGS = 0 V, ISD = 19 A - 1.1 V trr Reverse recovery time - 25 ns Qrr Reverse recovery charge - 17.5 nC IRRM Reverse recovery current ISD = 19 A, di/dt = 100 A/µs, VDD = 25 V, Tj = 150 °C (see Figure 15: "Test circuit for inductive load switching and diode recovery times") - 1.4 A Notes: (1) Pulse width is limited by safe operating area. (2) Pulse test: pulse duration = 300 µs, duty cycle 1.5%. DocID022356 Rev 4 5/16 Electrical characteristics 2.1 STL66N3LLH5 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics 6/16 Figure 5: Transfer characteristics DocID022356 Rev 4 STL66N3LLH5 Electrical characteristics Figure 7: Static drain-source on-resistance Figure 6: Gate charge vs gate-source voltage 5.0 4.5 4.0 3.5 3.0 Figure 8: Capacitance variations HV42930 C(pF) f=1MHz VGS=0 2000 1 5 9 13 17 Figure 9: Normalized gate threshold voltage vs temperature HV42960 VGS(th) (norm) 1.2 Ciss ID=250 µA 1 1500 0.8 1000 0.6 0.4 500 Crss Coss 0 0 10 20 VDS(V) 0.2 0 -55 -30 DocID022356 Rev 4 -5 20 45 70 95 120 145 TJ(°C) 7/16 Electrical characteristics STL66N3LLH5 Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics HV42980 VSD(V) 0.9 TJ=-55 °C 0.8 TJ=25 °C 0.7 0.6 TJ=150 °C 0.5 0.4 0 8/16 5 10 DocID022356 Rev 4 15 ISD(A) STL66N3LLH5 3 Test circuits Test circuits Figure 13: Test circuit for resistive load switching times Figure 14: Test circuit for gate charge behavior Figure 15: Test circuit for inductive load switching and diode recovery times Figure 16: Unclamped inductive load test circuit Figure 17: Unclamped inductive waveform DocID022356 Rev 4 Figure 18: Switching time waveform 9/16 Package information 4 STL66N3LLH5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.1 PowerFLAT™ 5x6 package information Figure 19: PowerFLAT™ 5x6 WF type C package outline 8231817_WF_typeC_r15 10/16 DocID022356 Rev 4 STL66N3LLH5 Package information Table 9: PowerFLAT™ 5x6 WF type C mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 0.25 b 0.30 0.50 C 5.80 6.00 6.10 5.20 5.40 D 5.00 D2 4.15 D3 4.05 4.20 4.35 D4 4.80 5.00 5.10 D5 0.25 0.40 0.55 D6 0.15 0.30 0.45 e 4.45 1.27 E 6.20 E2 3.50 3.70 E3 2.35 2.55 E4 0.40 0.60 E5 0.08 0.28 E6 0.20 0.325 0.45 E7 0.85 1.00 1.15 E9 4.00 4.20 4.40 E10 3.55 3.70 3.85 K 1.05 L 0.90 1.00 1.10 L1 0.175 0.275 0.375 θ 0° DocID022356 Rev 4 6.40 6.60 1.35 12° 11/16 Package information STL66N3LLH5 Figure 20: PowerFLAT™ 5x6 recommended footprint (dimensions are in mm) 8231817_FOOTPRINT_rev15 12/16 DocID022356 Rev 4 STL66N3LLH5 4.2 Package information PowerFLAT™ 5X6 packing information Figure 21: PowerFLAT™ 5x6 WF tape (dimensions are in mm) Figure 22: PowerFLAT™ 5x6 package orientation in carrier tape DocID022356 Rev 4 13/16 Package information STL66N3LLH5 Figure 23: PowerFLAT™ 5x6 reel (dimensions are in mm) 14/16 DocID022356 Rev 4 STL66N3LLH5 5 Revision history Revision history Table 10: Document revision history Date Revision 19-Oct-2011 1 First release. 17-dec-2014 2 Document status promoted from preliminary to production data. Updated title, features and description in cover page. Updated Chapter: Package mechanical data and Chapter: Packaging mechanical data. 22-Jan-2016 3 Updated title and features in cover page. Updated Section 4.1: "PowerFLAT™ 5X6 package information" Minor text changes. 4 Updated title and features in cover page. Updated Section 4.1: "PowerFLAT™ 5x6 package information". Minor text changes. 09-May-2017 Changes DocID022356 Rev 4 15/16 STL66N3LLH5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 16/16 DocID022356 Rev 4