STL220N3LLH7

STL220N3LLH7 N-channel 30 V, 0.00081 Ω typ., 50 A STripFET™ VII DeepGATE™ Power MOSFET in a PowerFLAT™ 5x6 package Datasheet - production data Features Order code VDS RDS(on) max ID STL220N3LLH7 30 V 0.0011 Ω 50 A • Very low on-resistance 1 • Very low Qg 2 3 • High avalanche ruggedness 4 PowerFLAT™5x6 Applications • Switching applications Description Figure 1. Internal schematic diagram D(5, 6, 7, 8) 8 7 6 5 1 2 3 4 This device exhibits low on-state resistance and capacitance for improved conduction and switching performance. G(4) S(1, 2, 3) Top View AM15540v2 Table 1. Device summary Order code Marking Package Packaging STL220N3LLH7 220N3LL7 PowerFLATTM 5x6 Tape and reel May 2014 This is information on a product in full production. DocID024732 Rev 4 1/15 www.st.com 15 Contents STL220N3LLH7 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2/15 .............................................. 8 DocID024732 Rev 4 STL220N3LLH7 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ± 20 V Drain current (continuous) at TC = 25 °C 220 A ID (1) ID(1) Drain current (continuous) at TC = 100 °C 160 A (1)(2) Drain current (pulsed) 880 A ID (3) Drain current (continuous) at Tpcb = 25 °C 50 A ID (3) Drain current (continuous) at Tpcb = 100 °C 32 A IDM(2)(3) Drain current (pulsed) 200 A PTOT(1) Total dissipation at TC = 25 °C 113 W PTOT(3) Total dissipation at Tpcb = 25 °C 4 W -55 to 150 °C Value Unit IDM Tj Max. operating junction temperature 1. This value is rated according to Rthj-c 2. Pulse width limited by safe operating area. 3. This value is rated according to Rthj-pcb Table 3. Thermal data Symbol Parameter Rthj-pcb(1) Thermal resistance junction-pcb max 31.3 °C/W Rthj-case Thermal resistance junction-case max 1.1 °C/W 1. When mounted on FR-4 board of 1 inch², 2oz Cu, t < 10 sec DocID024732 Rev 4 3/15 Electrical characteristics 2 STL220N3LLH7 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. On /off states Symbol Parameter Test conditions Drain-source breakdown voltage ID = 250 μA, VGS = 0 IDSS Zero gate voltage drain current VGS = 0 V VDS = 24 V IGSS Gate-body leakage current VGS = ± 20 V, VDS = 0 V(BR)DSS VGS(th) Gate threshold voltage VDS = VGS, ID = 250 μA RDS(on) Static drain-source on-resistance Min. Typ. Max. 30 Unit V 1.2 1 μA ±100 nA 2.2 V VGS = 10 V, ID = 25 A 0.00081 0.0011 Ω VGS = 4.5 V, ID = 25 A 0.00115 0.0015 Ω Min. Typ. Max. Unit - 8650 - pF - 2400 - pF - 72 - pF Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Rg Intrinsic gate resistance Test conditions VDS = 25 V, f = 1 MHz, VGS = 0 VDD = 15 V, ID = 50 A, VGS = 4.5 V (see Figure 14) - 46 - nC - 26 - nC - 10 - nC f=1 MHz - 0.61 1.8 Ω Table 6. Switching times Symbol td(on) tr td(off) tf 4/15 Parameter Test conditions Min. Typ. Max. Unit - 55 - ns - 115 - ns Turn-off delay time - 70 - ns Fall time - 51 - ns Turn-on delay time Rise time VDD = 15 V, ID = 25 A, RG = 4.7 Ω, VGS = 4.5 V DocID024732 Rev 4 STL220N3LLH7 Electrical characteristics Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 50 A ISDM (1) Source-drain current (pulsed) - 200 A VSD (2) Forward on voltage - 1 V ISD trr ISD = 50 A, VGS = 0 Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ID = 50 A, di/dt = 100 A/μs VDD = 24 V - 66 ns - 101 nC - 3.1 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5% DocID024732 Rev 4 5/15 Electrical characteristics 2.1 STL220N3LLH7 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance *,3*6$ ,' $ GIPG290420141539SA K δ=0.5 —V  0.2 V ĆL HD Q DU LVĆ 6R ĆWK 5' ĆLQ D[Ć Q R ĆP \ DWL HU GĆE 2S LWH /LP  —V 0.1 10 -1 0.05 PV 0.02 0.01 PV PV  7M ƒ& 7F ƒ& 6LQJOHĆSXOVH    9'69  Figure 4. Output characteristics VGS=5, 6, 7, 8, 9, 10V 160 4V 140 Single pulse 10 -2 10 -5 10 -4 10 -3 10 -1 10 -2 tp(s) Figure 5. Transfer characteristics AM16187v1 ID (A) c AM16188v1 ID (A) VDS=2V 160 140 120 120 100 100 3V 80 80 60 60 40 40 20 20 0 0 1 0.5 0 VDS(V) 1.5 Figure 6. Gate charge vs gate-source voltage AM16189v1 VGS (V) VDD=15V ID=50A 10 0 1 2 3 4 5 6 7 VGS(V) Figure 7. Static drain-source on-resistance RDS(on) (mΩ) 0.84 AM16190v1 VGS=10V 0.83 8 0.82 6 0.81 4 0.80 2 0.79 0 0 6/15 20 40 60 80 100 Qg(nC) 0.78 0 DocID024732 Rev 4 5 10 15 20 25 30 35 40 45 ID(A) STL220N3LLH7 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature AM16191v1 C (pF) AM16192v1 VGS(th) (norm) 1.2 ID=250µA 10000 1.1 Ciss 8000 1 0.9 6000 0.8 0.7 4000 0.6 Coss 2000 0.5 0 0 10 30 20 Crss VDS(V) Figure 10. Normalized on-resistance vs temperature AM16193v1 RDS(on) 0.4 -75 -50 -25 0 25 50 75 100 125 TJ(°C) Figure 11. Normalized V(BR)DSS vs temperature AM16195v1 V(BR)DSS (norm) (norm) ID=25A VGS=10V 1.6 1.4 1.02 1.2 1 1 0.98 0.8 0.96 0.6 -75 -50 -25 0 ID=1mA 1.04 25 50 75 100 125 TJ(°C) 0.94 -75 -50 -25 0 25 50 75 100 125 TJ(°C) Figure 12. Source-drain diode forward characteristics AM16196v1 VSD(V) TJ=-55°C 0.9 TJ=25°C 0.8 0.7 0.6 TJ=150°C 0.5 0.4 0 5 10 15 20 25 30 35 40 45 ISD(A) DocID024732 Rev 4 7/15 Test circuits 3 STL220N3LLH7 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/15 0 DocID024732 Rev 4 10% AM01473v1 STL220N3LLH7 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID024732 Rev 4 9/15 Package mechanical data STL220N3LLH7 Figure 19. PowerFLAT™ 5x6 type S-C mechanical data %RWWRPĆYLHZ   3LQ LGHQWLILFDWLRQ   6LGHĆYLHZ 3LQ LGHQWLILFDWLRQ      7RSĆYLHZ 10/15 DocID024732 Rev 4 B+B& STL220N3LLH7 Package mechanical data Table 8. PowerFLAT™ 5x6 type S-C mechanical data mm Dim. Min. Typ. Max. A 0.80 1.00 A1 0.02 0.05 A2 b 0.25 0.30 0.50 D 5.20 E 6.15 D2 4.11 4.31 E2 3.50 3.70 e 1.27 e1 0.65 L 0.715 1.015 K 1.05 1.35 Figure 20. PowerFLAT™ 5x6 recommended footprint (dimensions in mm) Footprint DocID024732 Rev 4 11/15 Packaging mechanical data 5 STL220N3LLH7 Packaging mechanical data Figure 21. PowerFLAT™ 5x6 tape(a) P0 4.0±0.1 (II) P2 2.0±0.1 (I) T (0.30 ±0.05) E1 1.75±0.1 Y 0. 20 Do Ø1.55±0.05 W(12.00±0.3) F(5.50±0.1)(III) R Bo (5.30±0.1) C L EF D1 Ø1.5 MIN. REF .R0 .50 Y P1(8.00±0.1) Ao(6.30±0.1) Ko (1.20±0.1) SECTION Y-Y (I) Measured from centerline of sprocket hole to centerline of pocket. Base and bulk quantity 3000 pcs (II) Cumulative tolerance of 10 sprocket holes is ± 0.20 . (III) Measured from centerline of sprocket hole to centerline of pocket. 8234350_Tape_rev_C Figure 22. PowerFLAT™ 5x6 package orientation in carrier tape Pin 1 identification a. All dimensions are in millimeters. 12/15 DocID024732 Rev 4 STL220N3LLH7 Packaging mechanical data Figure 23. PowerFLAT™ 5x6 reel R0.60 W3 11.9/15.4 PART NO. 1.90 2.50 R25.00 ØN 178(±2.0) ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES W2 18.4 (max) A 330 (+0/-4.0) 4.00 2.50 77 ESD LOGO W1 12.4 (+2/-0) 06 PS ØA 128 2.20 R1.10 Ø21.2 All dimensions are in millimeters 13.00 CORE DETAIL 8234350_Reel_rev_C DocID024732 Rev 4 13/15 Revision history 6 STL220N3LLH7 Revision history Table 9. Document revision history 14/15 Date Revision Changes 04-Jun-2013 1 First release. 11-Jun-2013 2 – Changed: Description – Minor text changes 08-Nov-2013 3 – Modified: title, ID (Drain current (continuous) at Tpcb = 100 °C), PTOT (Total dissipation at TC and Tpcb = 25 °C) and TJ values in Table 2, Rthj-case value in Table 3, V(BR)DSS and VGS(th) test conditions, RDS(on) typical values, the entire typical values in Table 5, 6, RG value in Table 6, Vdd and typical values in Table 7 – Updated: Section 4: Package mechanical data and Section 5: Packaging mechanical data 08-May-2014 4 – Inserted: Rg parameter in Table 5 – Minor text changes DocID024732 Rev 4 STL220N3LLH7 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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